Module Name:    src
Committed By:   skrll
Date:           Sat Oct 20 06:35:34 UTC 2018

Modified Files:
        src/sys/arch/arm/altera: cycv_platform.c
        src/sys/arch/arm/arm: cpufunc.c
        src/sys/arch/arm/arm32: arm32_kvminit.c
        src/sys/arch/arm/include: cpufunc.h

Log Message:
Clean up around cpu_ttb and fix a bunch of builds


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/altera/cycv_platform.c
cvs rdiff -u -r1.174 -r1.175 src/sys/arch/arm/arm/cpufunc.c
cvs rdiff -u -r1.46 -r1.47 src/sys/arch/arm/arm32/arm32_kvminit.c
cvs rdiff -u -r1.80 -r1.81 src/sys/arch/arm/include/cpufunc.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/altera/cycv_platform.c
diff -u src/sys/arch/arm/altera/cycv_platform.c:1.3 src/sys/arch/arm/altera/cycv_platform.c:1.4
--- src/sys/arch/arm/altera/cycv_platform.c:1.3	Thu Oct 18 09:01:52 2018
+++ src/sys/arch/arm/altera/cycv_platform.c	Sat Oct 20 06:35:34 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: cycv_platform.c,v 1.3 2018/10/18 09:01:52 skrll Exp $ */
+/* $NetBSD: cycv_platform.c,v 1.4 2018/10/20 06:35:34 skrll Exp $ */
 
 /* This file is in the public domain. */
 
@@ -6,7 +6,7 @@
 #include "opt_multiprocessor.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cycv_platform.c,v 1.3 2018/10/18 09:01:52 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cycv_platform.c,v 1.4 2018/10/20 06:35:34 skrll Exp $");
 
 #define	_ARM32_BUS_DMA_PRIVATE
 #include <sys/param.h>
@@ -79,8 +79,6 @@ cycv_mpstart(void)
 	 * it was unmapped by u-boot in favor of the SDRAM. Plus the dtb is
 	 * stored very low in RAM so we can't re-map the Boot ROM easily.
 	 */
-	extern vaddr_t cpu_ttb;
-
 	pmap_map_chunk(cpu_ttb, CYCV_SDRAM_VBASE, CYCV_SDRAM_BASE, L1_S_SIZE,
 	    VM_PROT_READ|VM_PROT_WRITE, PMAP_NOCACHE);
 	*(volatile uint32_t *) CYCV_SDRAM_VBASE =

Index: src/sys/arch/arm/arm/cpufunc.c
diff -u src/sys/arch/arm/arm/cpufunc.c:1.174 src/sys/arch/arm/arm/cpufunc.c:1.175
--- src/sys/arch/arm/arm/cpufunc.c:1.174	Thu Oct 18 09:01:52 2018
+++ src/sys/arch/arm/arm/cpufunc.c	Sat Oct 20 06:35:34 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: cpufunc.c,v 1.174 2018/10/18 09:01:52 skrll Exp $	*/
+/*	$NetBSD: cpufunc.c,v 1.175 2018/10/20 06:35:34 skrll Exp $	*/
 
 /*
  * arm7tdmi support code Copyright (c) 2001 John Fremlin
@@ -49,7 +49,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.174 2018/10/18 09:01:52 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.175 2018/10/20 06:35:34 skrll Exp $");
 
 #include "opt_arm_start.h"
 #include "opt_compat_netbsd.h"
@@ -118,6 +118,9 @@ struct	arm_cache_info arm_scache;
 u_int	arm_dcache_align;
 u_int	arm_dcache_align_mask;
 
+// Define a TTB value that can never be used.
+uint32_t cpu_ttb = ~0;
+
 /* 1 == use cpu_sleep(), 0 == don't */
 int cpu_do_powersave;
 
@@ -3561,8 +3564,6 @@ cpu_earlydevice_va_p(void)
 		return false;
 
 	/* Don't access cpu_ttb unless the mmu is enabled */
-	extern uint32_t cpu_ttb;
-
 	const bool cpul1pt_p =
 	    ((armreg_ttbr_read() & -L1_TABLE_SIZE) == cpu_ttb) ||
 	    ((armreg_ttbr1_read() & -L1_TABLE_SIZE) == cpu_ttb);

Index: src/sys/arch/arm/arm32/arm32_kvminit.c
diff -u src/sys/arch/arm/arm32/arm32_kvminit.c:1.46 src/sys/arch/arm/arm32/arm32_kvminit.c:1.47
--- src/sys/arch/arm/arm32/arm32_kvminit.c:1.46	Thu Oct 18 09:01:52 2018
+++ src/sys/arch/arm/arm32/arm32_kvminit.c	Sat Oct 20 06:35:34 2018
@@ -1,4 +1,4 @@
-/*	$NetBSD: arm32_kvminit.c,v 1.46 2018/10/18 09:01:52 skrll Exp $	*/
+/*	$NetBSD: arm32_kvminit.c,v 1.47 2018/10/20 06:35:34 skrll Exp $	*/
 
 /*
  * Copyright (c) 2002, 2003, 2005  Genetec Corporation.  All rights reserved.
@@ -127,7 +127,7 @@
 #include "opt_multiprocessor.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: arm32_kvminit.c,v 1.46 2018/10/18 09:01:52 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: arm32_kvminit.c,v 1.47 2018/10/20 06:35:34 skrll Exp $");
 
 #include <sys/param.h>
 #include <sys/device.h>
@@ -423,9 +423,6 @@ valloc_pages(struct bootmem_info *bmi, p
 		memset((void *)pv->pv_va, 0, nbytes);
 }
 
-// Define a TTB value that can never be used.
-uint32_t cpu_ttb = ~0;
-
 void
 arm32_kernel_vm_init(vaddr_t kernel_vm_base, vaddr_t vectors, vaddr_t iovbase,
 	const struct pmap_devmap *devmap, bool mapallmem_p)
@@ -970,7 +967,6 @@ arm32_kernel_vm_init(vaddr_t kernel_vm_b
 	/* Switch tables */
 	VPRINTF("switching to new L1 page table @%#lx...\n", l1pt_pa);
 
-	extern uint32_t cpu_ttb;
 	cpu_ttb = l1pt_pa;
 
 	cpu_domains(DOMAIN_DEFAULT);

Index: src/sys/arch/arm/include/cpufunc.h
diff -u src/sys/arch/arm/include/cpufunc.h:1.80 src/sys/arch/arm/include/cpufunc.h:1.81
--- src/sys/arch/arm/include/cpufunc.h:1.80	Wed Aug 29 11:29:27 2018
+++ src/sys/arch/arm/include/cpufunc.h	Sat Oct 20 06:35:34 2018
@@ -413,6 +413,8 @@ extern u_int arm_dcache_align_mask;
 extern struct arm_cache_info arm_pcache;
 extern struct arm_cache_info arm_scache;
 
+extern uint32_t cpu_ttb;
+
 #endif	/* _GRRRRUMP */
 
 #endif	/* _KERNEL */

Reply via email to