Module Name: src
Committed By: msaitoh
Date: Fri Nov 2 08:09:21 UTC 2018
Modified Files:
src/sys/dev/pci: if_wm.c
Log Message:
After writing MDIC register, don't read quickly the same register but
do delay(50). Same as otehr OSes.
To generate a diff of this commit:
cvs rdiff -u -r1.592 -r1.593 src/sys/dev/pci/if_wm.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/pci/if_wm.c
diff -u src/sys/dev/pci/if_wm.c:1.592 src/sys/dev/pci/if_wm.c:1.593
--- src/sys/dev/pci/if_wm.c:1.592 Fri Nov 2 08:04:42 2018
+++ src/sys/dev/pci/if_wm.c Fri Nov 2 08:09:21 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: if_wm.c,v 1.592 2018/11/02 08:04:42 msaitoh Exp $ */
+/* $NetBSD: if_wm.c,v 1.593 2018/11/02 08:09:21 msaitoh Exp $ */
/*
* Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
@@ -83,7 +83,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.592 2018/11/02 08:04:42 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.593 2018/11/02 08:09:21 msaitoh Exp $");
#ifdef _KERNEL_OPT
#include "opt_net_mpsafe.h"
@@ -10087,10 +10087,10 @@ wm_gmii_mdic_readreg(device_t dev, int p
MDIC_REGADD(reg));
for (i = 0; i < WM_GEN_POLL_TIMEOUT * 3; i++) {
+ delay(50);
mdic = CSR_READ(sc, WMREG_MDIC);
if (mdic & MDIC_READY)
break;
- delay(50);
}
if ((mdic & MDIC_READY) == 0) {
@@ -10141,10 +10141,10 @@ wm_gmii_mdic_writereg(device_t dev, int
MDIC_REGADD(reg) | MDIC_DATA(val));
for (i = 0; i < WM_GEN_POLL_TIMEOUT * 3; i++) {
+ delay(50);
mdic = CSR_READ(sc, WMREG_MDIC);
if (mdic & MDIC_READY)
break;
- delay(50);
}
if ((mdic & MDIC_READY) == 0) {
