Module Name: src
Committed By: ryo
Date: Wed Dec 12 11:14:51 UTC 2018
Modified Files:
src/sys/arch/aarch64/aarch64: cpuswitch.S idle_machdep.S
Log Message:
- need to save/restore interrupt mask when entering/exiting to/from
cpu_switchto_softint().
- when call dosoftints from cpu_idle, interrupts should be disabled.
rarely, lwp stack had been exhausted when high interrupts.
reported by alnsn@. thanks.
To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/aarch64/aarch64/cpuswitch.S
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/aarch64/aarch64/idle_machdep.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/cpuswitch.S
diff -u src/sys/arch/aarch64/aarch64/cpuswitch.S:1.8 src/sys/arch/aarch64/aarch64/cpuswitch.S:1.9
--- src/sys/arch/aarch64/aarch64/cpuswitch.S:1.8 Tue Dec 11 18:11:33 2018
+++ src/sys/arch/aarch64/aarch64/cpuswitch.S Wed Dec 12 11:14:51 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: cpuswitch.S,v 1.8 2018/12/11 18:11:33 ryo Exp $ */
+/* $NetBSD: cpuswitch.S,v 1.9 2018/12/12 11:14:51 ryo Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -37,7 +37,7 @@
#include "opt_ddb.h"
#include "opt_kasan.h"
-RCSID("$NetBSD: cpuswitch.S,v 1.8 2018/12/11 18:11:33 ryo Exp $")
+RCSID("$NetBSD: cpuswitch.S,v 1.9 2018/12/12 11:14:51 ryo Exp $")
/*
* At IPL_SCHED:
@@ -123,6 +123,7 @@ ENTRY_NP(cpu_switchto_softint)
sub sp, sp, #TF_SIZE /* make switchframe */
adr x2, softint_cleanup /* return address for cpu_switchto() */
mov x20, lr /* x20 := original lr */
+ mrs x19, daif /* x19 := original interrupt mask */
stp x19, x20, [sp, #TF_X19]
stp x21, x22, [sp, #TF_X21]
stp x23, x24, [sp, #TF_X23]
@@ -172,8 +173,11 @@ ENTRY_NP(cpu_switchto_softint)
#endif
mov sp, x4 /* restore pinned_lwp sp */
msr cpacr_el1, x5 /* restore pinned_lwp cpacr */
- ENABLE_INTERRUPT
+
+ ldp x19, x20, [sp, #TF_X19]
+ msr daif, x19 /* restore interrupt mask */
mov lr, x20 /* restore pinned_lwp lr */
+
add sp, sp, #TF_SIZE /* unwind switchframe */
ldp x19, x20, [sp], #16 /* restore */
ret
@@ -199,7 +203,8 @@ ENTRY_NP(softint_cleanup)
str w2, [x3, #CI_MTX_COUNT]
str wzr, [x0, #L_CTXSWTCH] /* softlwp->l_ctxswtch = 0 */
- ldp x19, x20, [sp], #16
+ msr daif, x19 /* restore interrupt mask */
+ ldp x19, x20, [sp], #16 /* restore */
ret
END(softint_cleanup)
Index: src/sys/arch/aarch64/aarch64/idle_machdep.S
diff -u src/sys/arch/aarch64/aarch64/idle_machdep.S:1.2 src/sys/arch/aarch64/aarch64/idle_machdep.S:1.3
--- src/sys/arch/aarch64/aarch64/idle_machdep.S:1.2 Sun Apr 1 04:35:03 2018
+++ src/sys/arch/aarch64/aarch64/idle_machdep.S Wed Dec 12 11:14:51 2018
@@ -1,4 +1,4 @@
-/* $NetBSD: idle_machdep.S,v 1.2 2018/04/01 04:35:03 ryo Exp $ */
+/* $NetBSD: idle_machdep.S,v 1.3 2018/12/12 11:14:51 ryo Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -35,7 +35,7 @@
#include "opt_arm_intr_impl.h"
#include "opt_ddb.h"
-RCSID("$NetBSD: idle_machdep.S,v 1.2 2018/04/01 04:35:03 ryo Exp $");
+RCSID("$NetBSD: idle_machdep.S,v 1.3 2018/12/12 11:14:51 ryo Exp $");
#ifdef ARM_INTR_IMPL
#include ARM_INTR_IMPL
@@ -89,20 +89,21 @@ ENTRY(cpu_idle)
mrs x1, tpidr_el1 /* get curcpu() */
str w28, [x1, #CI_INTR_DEPTH] /* ci->ci_intr_depth = old */
- ldr x28, [sp, #TF_X28] /* restore x28 */
- ldp x29, x30, [sp, #TF_X29] /* restore x29,x30 */
- add sp, sp, #TF_SIZE /* pop trapframe */
-
- ENABLE_INTERRUPT
-
#if defined(__HAVE_FAST_SOFTINTS) && !defined(__HAVE_PIC_FAST_SOFTINTS)
ldr w3, [x1, #CI_SOFTINTS] /* Get pending softint mask */
/* CPL should be 0 */
ldr w2, [x1, #CI_CPL] /* Get current priority level */
lsr w3, w3, w2 /* shift mask by cpl */
- cbnz w3, _C_LABEL(dosoftints) /* tailcall dosoftints() */
+ cbz w3, 1f
+ bl _C_LABEL(dosoftints) /* dosoftints() */
+1:
#endif /* __HAVE_FAST_SOFTINTS && !__HAVE_PIC_FAST_SOFTINTS */
+ ldr x28, [sp, #TF_X28] /* restore x28 */
+ ldp x29, x30, [sp, #TF_X29] /* restore x29,x30 */
+ add sp, sp, #TF_SIZE /* pop trapframe */
+
+ ENABLE_INTERRUPT
#endif /* LAZY_CPUIDLE */
ret
