Module Name: src
Committed By: cherry
Date: Sat Dec 22 06:33:37 UTC 2018
Modified Files:
src/sys/arch/amd64/conf: files.amd64
src/sys/arch/i386/conf: files.i386
src/sys/arch/xen/conf: files.xen
Added Files:
src/sys/arch/amd64/amd64: amd64_mainbus.c
src/sys/arch/i386/i386: i386_mainbus.c
src/sys/arch/xen/x86: xen_mainbus.c
Removed Files:
src/sys/arch/amd64/amd64: mainbus.c
src/sys/arch/i386/i386: mainbus.c
src/sys/arch/xen/x86: mainbus.c
Log Message:
Move mainbus(4) driver files in various x86 sub-archs to name prefixed
versions. This allows us to further modularise them by unifying common
bus probe code in x86/x86/mainbus.c to be introduced next.
This commit has no functional changes. It is done for ease of
visibility of newer diffs in the queue.
To generate a diff of this commit:
cvs rdiff -u -r0 -r1.1 src/sys/arch/amd64/amd64/amd64_mainbus.c
cvs rdiff -u -r1.39 -r0 src/sys/arch/amd64/amd64/mainbus.c
cvs rdiff -u -r1.108 -r1.109 src/sys/arch/amd64/conf/files.amd64
cvs rdiff -u -r1.397 -r1.398 src/sys/arch/i386/conf/files.i386
cvs rdiff -u -r0 -r1.1 src/sys/arch/i386/i386/i386_mainbus.c
cvs rdiff -u -r1.104 -r0 src/sys/arch/i386/i386/mainbus.c
cvs rdiff -u -r1.170 -r1.171 src/sys/arch/xen/conf/files.xen
cvs rdiff -u -r1.19 -r0 src/sys/arch/xen/x86/mainbus.c
cvs rdiff -u -r0 -r1.1 src/sys/arch/xen/x86/xen_mainbus.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/amd64/conf/files.amd64
diff -u src/sys/arch/amd64/conf/files.amd64:1.108 src/sys/arch/amd64/conf/files.amd64:1.109
--- src/sys/arch/amd64/conf/files.amd64:1.108 Mon Dec 3 00:12:22 2018
+++ src/sys/arch/amd64/conf/files.amd64 Sat Dec 22 06:33:36 2018
@@ -1,4 +1,4 @@
-# $NetBSD: files.amd64,v 1.108 2018/12/03 00:12:22 christos Exp $
+# $NetBSD: files.amd64,v 1.109 2018/12/22 06:33:36 cherry Exp $
#
# new style config file for amd64 architecture
#
@@ -94,7 +94,7 @@ include "dev/i2o/files.i2o"
# XXX BIOS32 only if something that uses it is configured!
device mainbus: isabus, pcibus, bios32, acpibus, cpubus, ioapicbus, ipmibus
attach mainbus at root
-file arch/amd64/amd64/mainbus.c mainbus
+file arch/amd64/amd64/amd64_mainbus.c mainbus
#
# PCI-only drivers
Index: src/sys/arch/i386/conf/files.i386
diff -u src/sys/arch/i386/conf/files.i386:1.397 src/sys/arch/i386/conf/files.i386:1.398
--- src/sys/arch/i386/conf/files.i386:1.397 Mon Dec 3 00:11:39 2018
+++ src/sys/arch/i386/conf/files.i386 Sat Dec 22 06:33:36 2018
@@ -1,4 +1,4 @@
-# $NetBSD: files.i386,v 1.397 2018/12/03 00:11:39 christos Exp $
+# $NetBSD: files.i386,v 1.398 2018/12/22 06:33:36 cherry Exp $
#
# new style config file for i386 architecture
#
@@ -129,7 +129,7 @@ device mainbus: isabus, eisabus, mcabus,
cpubus, ioapicbus, apmbus, pnpbiosbus, ipmibus,
bioscall
attach mainbus at root
-file arch/i386/i386/mainbus.c mainbus
+file arch/i386/i386/i386_mainbus.c mainbus
#
# PCI-only drivers
Index: src/sys/arch/xen/conf/files.xen
diff -u src/sys/arch/xen/conf/files.xen:1.170 src/sys/arch/xen/conf/files.xen:1.171
--- src/sys/arch/xen/conf/files.xen:1.170 Thu Jul 26 15:38:26 2018
+++ src/sys/arch/xen/conf/files.xen Sat Dec 22 06:33:37 2018
@@ -1,4 +1,4 @@
-# $NetBSD: files.xen,v 1.170 2018/07/26 15:38:26 maxv Exp $
+# $NetBSD: files.xen,v 1.171 2018/12/22 06:33:37 cherry Exp $
# NetBSD: files.x86,v 1.10 2003/10/08 17:30:00 bouyer Exp
# NetBSD: files.i386,v 1.254 2004/03/25 23:32:10 jmc Exp
@@ -173,7 +173,7 @@ define ipmibus {}
device mainbus: cpubus, ioapicbus, hypervisorbus, bios32, ipmibus
attach mainbus at root
-file arch/xen/x86/mainbus.c mainbus
+file arch/xen/x86/xen_mainbus.c mainbus
# Xen hypervisor
device hypervisor { [apid = -1]}: isabus, pcibus, sysmon_power, xendevbus, acpibus
Added files:
Index: src/sys/arch/amd64/amd64/amd64_mainbus.c
diff -u /dev/null src/sys/arch/amd64/amd64/amd64_mainbus.c:1.1
--- /dev/null Sat Dec 22 06:33:37 2018
+++ src/sys/arch/amd64/amd64/amd64_mainbus.c Sat Dec 22 06:33:36 2018
@@ -0,0 +1,326 @@
+/* $NetBSD: amd64_mainbus.c,v 1.1 2018/12/22 06:33:36 cherry Exp $ */
+
+/*
+ * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Christopher G. Demetriou
+ * for the NetBSD Project.
+ * 4. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: amd64_mainbus.c,v 1.1 2018/12/22 06:33:36 cherry Exp $");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+#include <sys/reboot.h>
+#include <sys/bus.h>
+
+#include <dev/isa/isavar.h>
+#include <dev/pci/pcivar.h>
+
+#include <dev/isa/isareg.h>
+
+#include "pci.h"
+#include "isa.h"
+#include "isadma.h"
+#include "acpica.h"
+#include "ipmi.h"
+
+#include "opt_acpi.h"
+#include "opt_mpbios.h"
+#include "opt_pcifixup.h"
+
+#include <machine/cpuvar.h>
+#include <machine/i82093var.h>
+#include <machine/mpbiosvar.h>
+#include <machine/mpacpi.h>
+
+#if NACPICA > 0
+#include <dev/acpi/acpivar.h>
+#endif
+
+#if NIPMI > 0
+#include <x86/ipmivar.h>
+#endif
+
+#if NPCI > 0
+#if defined(PCI_BUS_FIXUP)
+#include <arch/x86/pci/pci_bus_fixup.h>
+#if defined(PCI_ADDR_FIXUP)
+#include <arch/x86/pci/pci_addr_fixup.h>
+#endif
+#endif
+#ifdef __HAVE_PCI_MSI_MSIX
+#include <arch/x86/pci/msipic.h>
+#endif /* __HAVE_PCI_MSI_MSIX */
+#endif
+
+/*
+ * XXXfvdl ACPI
+ */
+
+int mainbus_match(device_t, cfdata_t, void *);
+void mainbus_attach(device_t, device_t, void *);
+
+CFATTACH_DECL_NEW(mainbus, 0,
+ mainbus_match, mainbus_attach, NULL, NULL);
+
+int mainbus_print(void *, const char *);
+
+union mainbus_attach_args {
+ const char *mba_busname; /* first elem of all */
+ struct pcibus_attach_args mba_pba;
+ struct isabus_attach_args mba_iba;
+ struct cpu_attach_args mba_caa;
+#if NACPICA > 0
+ struct acpibus_attach_args mba_acpi;
+#endif
+ struct apic_attach_args aaa_caa;
+#if NIPMI > 0
+ struct ipmi_attach_args mba_ipmi;
+#endif
+};
+
+/*
+ * This is set when the ISA bus is attached. If it's not set by the
+ * time it's checked below, then mainbus attempts to attach an ISA.
+ */
+int isa_has_been_seen;
+struct x86_isa_chipset x86_isa_chipset;
+#if NISA > 0
+static const struct isabus_attach_args mba_iba = {
+ ._iba_busname = "isa",
+ .iba_dmat = &isa_bus_dma_tag,
+ .iba_ic = &x86_isa_chipset
+};
+#endif
+
+#if defined(MPBIOS) || NACPICA > 0
+struct mp_bus *mp_busses;
+int mp_nbus;
+struct mp_intr_map *mp_intrs;
+int mp_nintr;
+
+int mp_isa_bus = -1;
+int mp_eisa_bus = -1;
+
+bool acpi_present;
+bool mpacpi_active;
+
+# ifdef MPVERBOSE
+# if MPVERBOSE > 0
+int mp_verbose = MPVERBOSE;
+# else
+int mp_verbose = 1;
+# endif
+# else
+int mp_verbose = 0;
+# endif
+#endif
+
+
+/*
+ * Probe for the mainbus; always succeeds.
+ */
+int
+mainbus_match(device_t parent, cfdata_t match, void *aux)
+{
+
+ return 1;
+}
+
+/*
+ * Attach the mainbus.
+ */
+void
+mainbus_attach(device_t parent, device_t self, void *aux)
+{
+#if NPCI > 0 || NACPICA > 0 || NIPMI > 0
+ union mainbus_attach_args mba;
+#endif
+#if NPCI > 0
+ int mode;
+#endif
+#ifdef MPBIOS
+ int mpbios_present = 0;
+#endif
+ int numcpus = 0;
+#if defined(PCI_BUS_FIXUP)
+ int pci_maxbus = 0;
+#endif
+
+ aprint_naive("\n");
+ aprint_normal("\n");
+
+#ifdef MPBIOS
+ mpbios_present = mpbios_probe(self);
+#endif
+
+#if NPCI > 0
+#ifdef __HAVE_PCI_MSI_MSIX
+ msipic_init();
+#endif
+
+ /*
+ * ACPI needs to be able to access PCI configuration space.
+ */
+ mode = pci_mode_detect();
+#if defined(PCI_BUS_FIXUP)
+ if (mode != 0) {
+ pci_maxbus = pci_bus_fixup(NULL, 0);
+ aprint_debug("PCI bus max, after pci_bus_fixup: %i\n",
+ pci_maxbus);
+#if defined(PCI_ADDR_FIXUP)
+ pciaddr.extent_port = NULL;
+ pciaddr.extent_mem = NULL;
+ pci_addr_fixup(NULL, pci_maxbus);
+#endif
+ }
+#endif
+#endif
+
+#if NACPICA > 0
+ if ((boothowto & RB_MD2) == 0 && acpi_check(self, "acpibus"))
+ acpi_present = acpi_probe() != 0;
+ /*
+ * First, see if the MADT contains CPUs, and possibly I/O APICs.
+ * Building the interrupt routing structures can only
+ * be done later (via a callback).
+ */
+ if (acpi_present)
+ mpacpi_active = mpacpi_scan_apics(self, &numcpus) != 0;
+
+ if (!mpacpi_active) {
+#endif
+#ifdef MPBIOS
+ if (mpbios_present)
+ mpbios_scan(self, &numcpus);
+ else
+#endif
+ if (numcpus == 0) {
+ struct cpu_attach_args caa;
+
+ memset(&caa, 0, sizeof(caa));
+ caa.cpu_number = 0;
+ caa.cpu_role = CPU_ROLE_SP;
+ caa.cpu_func = 0;
+
+ config_found_ia(self, "cpubus", &caa, mainbus_print);
+ }
+#if NACPICA > 0
+ }
+#endif
+
+#if NISADMA > 0 && NACPICA > 0
+ /*
+ * ACPI needs ISA DMA initialized before they start probing.
+ */
+ isa_dmainit(&x86_isa_chipset, x86_bus_space_io, &isa_bus_dma_tag,
+ self);
+#endif
+
+#if NACPICA > 0
+ if (acpi_present) {
+ mba.mba_acpi.aa_iot = x86_bus_space_io;
+ mba.mba_acpi.aa_memt = x86_bus_space_mem;
+ mba.mba_acpi.aa_pc = NULL;
+ mba.mba_acpi.aa_pciflags =
+ PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY |
+ PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY |
+ PCI_FLAGS_MWI_OKAY;
+ mba.mba_acpi.aa_ic = &x86_isa_chipset;
+ mba.mba_acpi.aa_dmat = &pci_bus_dma_tag;
+ mba.mba_acpi.aa_dmat64 = &pci_bus_dma64_tag;
+ config_found_ia(self, "acpibus", &mba.mba_acpi, 0);
+ }
+#endif
+
+#if NIPMI > 0
+ memset(&mba.mba_ipmi, 0, sizeof(mba.mba_ipmi));
+ mba.mba_ipmi.iaa_iot = x86_bus_space_io;
+ mba.mba_ipmi.iaa_memt = x86_bus_space_mem;
+ if (ipmi_probe(&mba.mba_ipmi))
+ config_found_ia(self, "ipmibus", &mba.mba_ipmi, 0);
+#endif
+
+#if NPCI > 0
+ if (mode != 0) {
+ int npcibus = 0;
+
+ mba.mba_pba.pba_iot = x86_bus_space_io;
+ mba.mba_pba.pba_memt = x86_bus_space_mem;
+ mba.mba_pba.pba_dmat = &pci_bus_dma_tag;
+ mba.mba_pba.pba_dmat64 = &pci_bus_dma64_tag;
+ mba.mba_pba.pba_pc = NULL;
+ mba.mba_pba.pba_flags =
+ PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY |
+ PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY |
+ PCI_FLAGS_MWI_OKAY;
+ mba.mba_pba.pba_bus = 0;
+ mba.mba_pba.pba_bridgetag = NULL;
+#if NACPICA > 0 && defined(ACPI_SCANPCI)
+ if (npcibus == 0 && mpacpi_active)
+ npcibus = mp_pci_scan(self, &mba.mba_pba, pcibusprint);
+#endif
+#if defined(MPBIOS) && defined(MPBIOS_SCANPCI)
+ if (npcibus == 0 && mpbios_scanned != 0)
+ npcibus = mp_pci_scan(self, &mba.mba_pba, pcibusprint);
+#endif
+ if (npcibus == 0)
+ config_found_ia(self, "pcibus", &mba.mba_pba,
+ pcibusprint);
+
+#if NACPICA > 0
+ if (mp_verbose)
+ acpi_pci_link_state();
+#endif
+
+ }
+#endif
+
+#if NISA > 0
+ if (isa_has_been_seen == 0) {
+ mba.mba_iba = mba_iba;
+ mba.mba_iba.iba_iot = x86_bus_space_io;
+ mba.mba_iba.iba_memt = x86_bus_space_mem;
+ config_found_ia(self, "isabus", &mba.mba_iba, isabusprint);
+ }
+#endif
+
+ if (!pmf_device_register(self, NULL, NULL))
+ aprint_error_dev(self, "couldn't establish power handler\n");
+}
+
+int
+mainbus_print(void *aux, const char *pnp)
+{
+ union mainbus_attach_args *mba = aux;
+
+ if (pnp)
+ aprint_normal("%s at %s", mba->mba_busname, pnp);
+ return (UNCONF);
+}
Index: src/sys/arch/i386/i386/i386_mainbus.c
diff -u /dev/null src/sys/arch/i386/i386/i386_mainbus.c:1.1
--- /dev/null Sat Dec 22 06:33:37 2018
+++ src/sys/arch/i386/i386/i386_mainbus.c Sat Dec 22 06:33:36 2018
@@ -0,0 +1,465 @@
+/* $NetBSD: i386_mainbus.c,v 1.1 2018/12/22 06:33:36 cherry Exp $ */
+
+/*
+ * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Christopher G. Demetriou
+ * for the NetBSD Project.
+ * 4. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: i386_mainbus.c,v 1.1 2018/12/22 06:33:36 cherry Exp $");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+#include <sys/reboot.h>
+#include <sys/bus.h>
+
+#include <dev/isa/isavar.h>
+#include <dev/eisa/eisavar.h>
+#include <dev/pci/pcivar.h>
+
+#include <dev/isa/isareg.h> /* for ISA_HOLE_VADDR */
+
+#include "pci.h"
+#include "eisa.h"
+#include "isa.h"
+#include "isadma.h"
+#include "mca.h"
+#include "pnpbios.h"
+#include "acpica.h"
+#include "ipmi.h"
+
+#include "opt_acpi.h"
+#include "opt_mpbios.h"
+#include "opt_pcifixup.h"
+
+#include <machine/cpuvar.h>
+#include <machine/i82093var.h>
+#include <machine/mpbiosvar.h>
+#include <machine/mpacpi.h>
+
+#if NPNPBIOS > 0
+#include <arch/i386/pnpbios/pnpbiosvar.h>
+#endif
+
+#if NACPICA > 0
+#include <dev/acpi/acpivar.h>
+#endif
+
+#if NMCA > 0
+#include <dev/mca/mcavar.h>
+#endif
+
+#if NIPMI > 0
+#include <x86/ipmivar.h>
+#endif
+
+#if NPCI > 0
+#if defined(PCI_BUS_FIXUP)
+#include <arch/x86/pci/pci_bus_fixup.h>
+#if defined(PCI_ADDR_FIXUP)
+#include <arch/x86/pci/pci_addr_fixup.h>
+#endif
+#endif
+#ifdef __HAVE_PCI_MSI_MSIX
+#include <arch/x86/pci/msipic.h>
+#endif /* __HAVE_PCI_MSI_MSIX */
+#endif
+
+void mainbus_childdetached(device_t, device_t);
+int mainbus_match(device_t, cfdata_t, void *);
+void mainbus_attach(device_t, device_t, void *);
+
+static int mainbus_rescan(device_t, const char *, const int *);
+
+struct mainbus_softc {
+ device_t sc_acpi;
+ device_t sc_dev;
+ device_t sc_ipmi;
+ device_t sc_pci;
+ device_t sc_mca;
+ device_t sc_pnpbios;
+};
+
+CFATTACH_DECL2_NEW(mainbus, sizeof(struct mainbus_softc),
+ mainbus_match, mainbus_attach, NULL, NULL, mainbus_rescan,
+ mainbus_childdetached);
+
+int mainbus_print(void *, const char *);
+
+union mainbus_attach_args {
+ const char *mba_busname; /* first elem of all */
+ struct pcibus_attach_args mba_pba;
+ struct eisabus_attach_args mba_eba;
+ struct isabus_attach_args mba_iba;
+#if NMCA > 0
+ struct mcabus_attach_args mba_mba;
+#endif
+#if NPNPBIOS > 0
+ struct pnpbios_attach_args mba_paa;
+#endif
+ struct cpu_attach_args mba_caa;
+ struct apic_attach_args aaa_caa;
+#if NACPICA > 0
+ struct acpibus_attach_args mba_acpi;
+#endif
+#if NIPMI > 0
+ struct ipmi_attach_args mba_ipmi;
+#endif
+};
+
+/*
+ * This is set when the ISA bus is attached. If it's not set by the
+ * time it's checked below, then mainbus attempts to attach an ISA.
+ */
+int isa_has_been_seen;
+struct x86_isa_chipset x86_isa_chipset;
+#if NISA > 0
+static const struct isabus_attach_args mba_iba = {
+ ._iba_busname = "isa",
+ .iba_dmat = &isa_bus_dma_tag,
+ .iba_ic = &x86_isa_chipset
+};
+#endif
+
+/*
+ * Same as above, but for EISA.
+ */
+int eisa_has_been_seen;
+
+#if defined(MPBIOS) || NACPICA > 0
+struct mp_bus *mp_busses;
+int mp_nbus;
+struct mp_intr_map *mp_intrs;
+int mp_nintr;
+
+int mp_isa_bus = -1; /* XXX */
+int mp_eisa_bus = -1; /* XXX */
+
+bool acpi_present;
+bool mpacpi_active;
+
+# ifdef MPVERBOSE
+# if MPVERBOSE > 0
+int mp_verbose = MPVERBOSE;
+# else
+int mp_verbose = 1;
+# endif
+# else
+int mp_verbose = 0;
+# endif
+#endif
+
+void
+mainbus_childdetached(device_t self, device_t child)
+{
+ struct mainbus_softc *sc = device_private(self);
+
+ if (sc->sc_acpi == child)
+ sc->sc_acpi = NULL;
+ if (sc->sc_ipmi == child)
+ sc->sc_ipmi = NULL;
+ if (sc->sc_mca == child)
+ sc->sc_mca = NULL;
+ if (sc->sc_pnpbios == child)
+ sc->sc_pnpbios = NULL;
+ if (sc->sc_pci == child)
+ sc->sc_pci = NULL;
+
+#if NPCI > 0
+ mp_pci_childdetached(self, child);
+#endif
+}
+
+/*
+ * Probe for the mainbus; always succeeds.
+ */
+int
+mainbus_match(device_t parent, cfdata_t match, void *aux)
+{
+
+ return 1;
+}
+
+/*
+ * Attach the mainbus.
+ */
+void
+mainbus_attach(device_t parent, device_t self, void *aux)
+{
+#if NPCI > 0
+ int mode;
+#endif
+ struct mainbus_softc *sc = device_private(self);
+ union mainbus_attach_args mba;
+#ifdef MPBIOS
+ int mpbios_present = 0;
+#endif
+#if defined(PCI_BUS_FIXUP)
+ int pci_maxbus = 0;
+#endif
+ int numcpus = 0;
+
+ sc->sc_dev = self;
+
+ aprint_naive("\n");
+ aprint_normal("\n");
+
+#ifdef MPBIOS
+ mpbios_present = mpbios_probe(self);
+#endif
+
+#if NPCI > 0
+ msipic_init();
+
+ /*
+ * ACPI needs to be able to access PCI configuration space.
+ */
+ mode = pci_mode_detect();
+#if defined(PCI_BUS_FIXUP)
+ if (mode != 0) {
+ pci_maxbus = pci_bus_fixup(NULL, 0);
+ aprint_debug("PCI bus max, after pci_bus_fixup: %i\n",
+ pci_maxbus);
+#if defined(PCI_ADDR_FIXUP)
+ pciaddr.extent_port = NULL;
+ pciaddr.extent_mem = NULL;
+ pci_addr_fixup(NULL, pci_maxbus);
+#endif
+ }
+#else
+ __USE(mode);
+#endif
+#endif
+
+#if NACPICA > 0
+ if ((boothowto & RB_MD2) == 0 && acpi_check(self, "acpibus"))
+ acpi_present = acpi_probe() != 0;
+ /*
+ * First, see if the MADT contains CPUs, and possibly I/O APICs.
+ * Building the interrupt routing structures can only
+ * be done later (via a callback).
+ */
+ if (acpi_present)
+ mpacpi_active = mpacpi_scan_apics(self, &numcpus) != 0;
+#endif
+
+ if (!mpacpi_active) {
+#ifdef MPBIOS
+ if (mpbios_present)
+ mpbios_scan(self, &numcpus);
+ else
+#endif
+ if (numcpus == 0) {
+ struct cpu_attach_args caa;
+
+ memset(&caa, 0, sizeof(caa));
+ caa.cpu_number = 0;
+ caa.cpu_role = CPU_ROLE_SP;
+ caa.cpu_func = 0;
+
+ config_found_ia(self, "cpubus", &caa, mainbus_print);
+ }
+ }
+
+#if NISADMA > 0 && (NACPICA > 0 || NPNPBIOS > 0)
+ /*
+ * ACPI and PNPBIOS need ISA DMA initialized before they start probing.
+ */
+ isa_dmainit(&x86_isa_chipset, x86_bus_space_io, &isa_bus_dma_tag,
+ self);
+#endif
+
+ mainbus_rescan(self, "acpibus", NULL);
+
+ mainbus_rescan(self, "pnpbiosbus", NULL);
+
+ mainbus_rescan(self, "ipmibus", NULL);
+
+ mainbus_rescan(self, "pcibus", NULL);
+
+ mainbus_rescan(self, "mcabus", NULL);
+
+ if (memcmp(ISA_HOLE_VADDR(EISA_ID_PADDR), EISA_ID, EISA_ID_LEN) == 0 &&
+ eisa_has_been_seen == 0) {
+ mba.mba_eba.eba_iot = x86_bus_space_io;
+ mba.mba_eba.eba_memt = x86_bus_space_mem;
+#if NEISA > 0
+ mba.mba_eba.eba_dmat = &eisa_bus_dma_tag;
+#endif
+ config_found_ia(self, "eisabus", &mba.mba_eba, eisabusprint);
+ }
+
+#if NISA > 0
+ if (isa_has_been_seen == 0) {
+ mba.mba_iba = mba_iba;
+ mba.mba_iba.iba_iot = x86_bus_space_io;
+ mba.mba_iba.iba_memt = x86_bus_space_mem;
+ config_found_ia(self, "isabus", &mba.mba_iba, isabusprint);
+ }
+#endif
+
+ if (!pmf_device_register(self, NULL, NULL))
+ aprint_error_dev(self, "couldn't establish power handler\n");
+}
+
+/* scan for new children */
+static int
+mainbus_rescan(device_t self, const char *ifattr, const int *locators)
+{
+ struct mainbus_softc *sc = device_private(self);
+#if NACPICA > 0 || NIPMI > 0 || NMCA > 0 || NPCI > 0 || NPNPBIOS > 0
+ union mainbus_attach_args mba;
+#endif
+
+ if (ifattr_match(ifattr, "acpibus") && sc->sc_acpi == NULL &&
+ acpi_present) {
+#if NACPICA > 0
+ mba.mba_acpi.aa_iot = x86_bus_space_io;
+ mba.mba_acpi.aa_memt = x86_bus_space_mem;
+ mba.mba_acpi.aa_pc = NULL;
+ mba.mba_acpi.aa_pciflags =
+ PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY |
+ PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY |
+ PCI_FLAGS_MWI_OKAY;
+ mba.mba_acpi.aa_ic = &x86_isa_chipset;
+ mba.mba_acpi.aa_dmat = &pci_bus_dma_tag;
+ mba.mba_acpi.aa_dmat64 = NULL;
+ sc->sc_acpi =
+ config_found_ia(self, "acpibus", &mba.mba_acpi, 0);
+#if 0 /* XXXJRT not yet */
+ if (acpi_active) {
+ /*
+ * ACPI already did all the work for us, there
+ * is nothing more for us to do.
+ */
+ return;
+ }
+#endif
+#endif
+ }
+
+ if (ifattr_match(ifattr, "pnpbiosbus") && sc->sc_pnpbios == NULL) {
+#if NPNPBIOS > 0
+#if NACPICA > 0
+ if (acpi_active == 0)
+#endif
+ if (pnpbios_probe()) {
+ mba.mba_paa.paa_ic = &x86_isa_chipset;
+ sc->sc_pnpbios = config_found_ia(self, "pnpbiosbus",
+ &mba.mba_paa, 0);
+ }
+#endif
+ }
+
+ if (ifattr_match(ifattr, "ipmibus") && sc->sc_ipmi == NULL) {
+#if NIPMI > 0
+ memset(&mba.mba_ipmi, 0, sizeof(mba.mba_ipmi));
+ mba.mba_ipmi.iaa_iot = x86_bus_space_io;
+ mba.mba_ipmi.iaa_memt = x86_bus_space_mem;
+ if (ipmi_probe(&mba.mba_ipmi)) {
+ sc->sc_ipmi =
+ config_found_ia(self, "ipmibus", &mba.mba_ipmi, 0);
+ }
+#endif
+ }
+
+ /*
+ * XXX Note also that the presence of a PCI bus should
+ * XXX _always_ be checked, and if present the bus should be
+ * XXX 'found'. However, because of the structure of the code,
+ * XXX that's not currently possible.
+ */
+#if NPCI > 0
+ if (pci_mode_detect() != 0 && ifattr_match(ifattr, "pcibus")) {
+ int npcibus = 0;
+
+ mba.mba_pba.pba_iot = x86_bus_space_io;
+ mba.mba_pba.pba_memt = x86_bus_space_mem;
+ mba.mba_pba.pba_dmat = &pci_bus_dma_tag;
+ mba.mba_pba.pba_dmat64 = NULL;
+ mba.mba_pba.pba_pc = NULL;
+ mba.mba_pba.pba_flags =
+ PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY |
+ PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY |
+ PCI_FLAGS_MWI_OKAY;
+ mba.mba_pba.pba_bus = 0;
+ /* XXX On those machines with >1 Host-PCI bridge,
+ * XXX not every bus > pba_bus is subordinate to pba_bus,
+ * XXX but this works on many machines, and pba_sub is
+ * XXX not used today by any critical code, so it is safe
+ * XXX to be so inclusive at this time.
+ */
+ mba.mba_pba.pba_sub = 255;
+ mba.mba_pba.pba_bridgetag = NULL;
+#if NACPICA > 0 && defined(ACPI_SCANPCI)
+ if (npcibus == 0 && mpacpi_active)
+ npcibus = mp_pci_scan(self, &mba.mba_pba, pcibusprint);
+#endif
+#if defined(MPBIOS) && defined(MPBIOS_SCANPCI)
+ if (npcibus == 0 && mpbios_scanned != 0)
+ npcibus = mp_pci_scan(self, &mba.mba_pba, pcibusprint);
+#endif
+ if (npcibus == 0 && sc->sc_pci == NULL) {
+ sc->sc_pci = config_found_ia(self, "pcibus",
+ &mba.mba_pba, pcibusprint);
+ }
+#if NACPICA > 0
+ if (mp_verbose)
+ acpi_pci_link_state();
+#endif
+ }
+#endif
+
+
+ if (ifattr_match(ifattr, "mcabus") && sc->sc_mca == NULL) {
+#if NMCA > 0
+ /* Note: MCA bus probe is done in i386/machdep.c */
+ if (MCA_system) {
+ mba.mba_mba.mba_iot = x86_bus_space_io;
+ mba.mba_mba.mba_memt = x86_bus_space_mem;
+ mba.mba_mba.mba_dmat = &mca_bus_dma_tag;
+ mba.mba_mba.mba_mc = NULL;
+ mba.mba_mba.mba_bus = 0;
+ sc->sc_mca = config_found_ia(self, "mcabus",
+ &mba.mba_mba, mcabusprint);
+ }
+#endif
+ }
+ return 0;
+}
+
+int
+mainbus_print(void *aux, const char *pnp)
+{
+ union mainbus_attach_args *mba = aux;
+
+ if (pnp)
+ aprint_normal("%s at %s", mba->mba_busname, pnp);
+ return (UNCONF);
+}
Index: src/sys/arch/xen/x86/xen_mainbus.c
diff -u /dev/null src/sys/arch/xen/x86/xen_mainbus.c:1.1
--- /dev/null Sat Dec 22 06:33:37 2018
+++ src/sys/arch/xen/x86/xen_mainbus.c Sat Dec 22 06:33:37 2018
@@ -0,0 +1,225 @@
+/* $NetBSD: xen_mainbus.c,v 1.1 2018/12/22 06:33:37 cherry Exp $ */
+/* NetBSD: mainbus.c,v 1.53 2003/10/27 14:11:47 junyoung Exp */
+
+/*
+ * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Christopher G. Demetriou
+ * for the NetBSD Project.
+ * 4. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: xen_mainbus.c,v 1.1 2018/12/22 06:33:37 cherry Exp $");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/device.h>
+
+#include <sys/bus.h>
+
+#include "hypervisor.h"
+#include "pci.h"
+
+#include "opt_xen.h"
+#include "opt_mpbios.h"
+#include "opt_pcifixup.h"
+
+#include "acpica.h"
+#include "ioapic.h"
+
+#include "ipmi.h"
+
+#include <machine/cpuvar.h>
+#include <machine/i82093var.h>
+
+#include <xen/xen.h>
+#include <xen/hypervisor.h>
+
+#if NIPMI > 0
+#include <x86/ipmivar.h>
+#endif
+
+#if NPCI > 0
+#include <dev/pci/pcivar.h>
+#if NACPICA > 0
+#include <dev/acpi/acpivar.h>
+#include <xen/mpacpi.h>
+#endif /* NACPICA > 0 */
+#ifdef MPBIOS
+#include <machine/mpbiosvar.h>
+#endif /* MPBIOS */
+#ifdef PCI_BUS_FIXUP
+#include <arch/x86/pci/pci_bus_fixup.h>
+#ifdef PCI_ADDR_FIXUP
+#include <arch/x86/pci/pci_addr_fixup.h>
+#endif
+#endif
+
+#if defined(MPBIOS) || NACPICA > 0
+struct mp_bus *mp_busses;
+int mp_nbus;
+struct mp_intr_map *mp_intrs;
+int mp_nintr;
+
+int mp_isa_bus = -1; /* XXX */
+int mp_eisa_bus = -1; /* XXX */
+
+bool acpi_present;
+bool mpacpi_active;
+#ifdef MPVERBOSE
+int mp_verbose = 1;
+#else /* MPVERBOSE */
+int mp_verbose = 0;
+#endif /* MPVERBOSE */
+#endif /* defined(MPBIOS) || NACPICA > 0 */
+#endif /* NPCI > 0 */
+
+
+int mainbus_match(device_t, cfdata_t, void *);
+void mainbus_attach(device_t, device_t, void *);
+
+CFATTACH_DECL_NEW(mainbus, 0,
+ mainbus_match, mainbus_attach, NULL, NULL);
+
+int mainbus_print(void *, const char *);
+
+union mainbus_attach_args {
+ const char *mba_busname; /* first elem of all */
+ struct cpu_attach_args mba_caa;
+#if NHYPERVISOR > 0
+ struct hypervisor_attach_args mba_haa;
+#endif
+#if NIPMI > 0
+ struct ipmi_attach_args mba_ipmi;
+#endif
+};
+
+/*
+ * Probe for the mainbus; always succeeds.
+ */
+int
+mainbus_match(device_t parent, cfdata_t match, void *aux)
+{
+
+ return 1;
+}
+
+/*
+ * Attach the mainbus.
+ */
+void
+mainbus_attach(device_t parent, device_t self, void *aux)
+{
+ union mainbus_attach_args mba;
+#if defined(DOM0OPS)
+ int numcpus = 0;
+#ifdef MPBIOS
+ int mpbios_present = 0;
+#endif
+#ifdef PCI_BUS_FIXUP
+ int pci_maxbus = 0;
+#endif
+#endif /* defined(DOM0OPS) */
+
+ aprint_naive("\n");
+ aprint_normal("\n");
+
+#ifdef DOM0OPS
+ if (xendomain_is_dom0()) {
+#ifdef MPBIOS
+ mpbios_present = mpbios_probe(self);
+#endif
+#if NPCI > 0
+ /* ACPI needs to be able to access PCI configuration space. */
+ pci_mode_detect();
+#ifdef PCI_BUS_FIXUP
+ if (pci_mode != 0) {
+ pci_maxbus = pci_bus_fixup(NULL, 0);
+ aprint_debug_dev(self, "PCI bus max, after "
+ "pci_bus_fixup: %i\n", pci_maxbus);
+#ifdef PCI_ADDR_FIXUP
+ pciaddr.extent_port = NULL;
+ pciaddr.extent_mem = NULL;
+ pci_addr_fixup(NULL, pci_maxbus);
+#endif /* PCI_ADDR_FIXUP */
+ }
+#endif /* PCI_BUS_FIXUP */
+#if NACPICA > 0
+ acpi_present = acpi_probe() != 0;
+ if (acpi_present)
+ mpacpi_active = mpacpi_scan_apics(self, &numcpus) != 0;
+ if (!mpacpi_active)
+#endif
+ {
+#ifdef MPBIOS
+ if (mpbios_present)
+ mpbios_scan(self, &numcpus);
+ else
+#endif
+ if (numcpus == 0) {
+ memset(&mba.mba_caa, 0, sizeof(mba.mba_caa));
+ mba.mba_caa.cpu_number = 0;
+ mba.mba_caa.cpu_role = CPU_ROLE_SP;
+ mba.mba_caa.cpu_func = 0;
+ config_found_ia(self, "cpubus",
+ &mba.mba_caa, mainbus_print);
+ }
+ }
+#if NIOAPIC > 0
+ ioapic_enable();
+#endif
+#endif /* NPCI */
+ }
+#endif /* DOM0OPS */
+
+#if NIPMI > 0
+ memset(&mba.mba_ipmi, 0, sizeof(mba.mba_ipmi));
+ mba.mba_ipmi.iaa_iot = x86_bus_space_io;
+ mba.mba_ipmi.iaa_memt = x86_bus_space_mem;
+ if (ipmi_probe(&mba.mba_ipmi))
+ config_found_ia(self, "ipmibus", &mba.mba_ipmi, 0);
+#endif
+
+#if NHYPERVISOR > 0
+ mba.mba_haa.haa_busname = "hypervisor";
+ config_found_ia(self, "hypervisorbus", &mba.mba_haa, mainbus_print);
+#endif
+
+ /* save/restore for Xen */
+ if (!pmf_device_register(self, NULL, NULL))
+ aprint_error_dev(self, "couldn't establish power handler\n");
+
+}
+
+int
+mainbus_print(void *aux, const char *pnp)
+{
+ union mainbus_attach_args *mba = aux;
+
+ if (pnp)
+ aprint_normal("%s at %s", mba->mba_busname, pnp);
+ return (UNCONF);
+}
