Module Name: src
Committed By: msaitoh
Date: Wed Dec 26 08:25:53 UTC 2018
Modified Files:
src/sys/dev/pci: pcidevs.h pcidevs_data.h
Log Message:
Regen.
To generate a diff of this commit:
cvs rdiff -u -r1.1345 -r1.1346 src/sys/dev/pci/pcidevs.h
cvs rdiff -u -r1.1344 -r1.1345 src/sys/dev/pci/pcidevs_data.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/pci/pcidevs.h
diff -u src/sys/dev/pci/pcidevs.h:1.1345 src/sys/dev/pci/pcidevs.h:1.1346
--- src/sys/dev/pci/pcidevs.h:1.1345 Mon Dec 3 18:24:18 2018
+++ src/sys/dev/pci/pcidevs.h Wed Dec 26 08:25:52 2018
@@ -1,10 +1,10 @@
-/* $NetBSD: pcidevs.h,v 1.1345 2018/12/03 18:24:18 bouyer Exp $ */
+/* $NetBSD: pcidevs.h,v 1.1346 2018/12/26 08:25:52 msaitoh Exp $ */
/*
* THIS FILE IS AUTOMATICALLY GENERATED. DO NOT EDIT.
*
* generated from:
- * NetBSD: pcidevs,v 1.1356 2018/12/03 18:23:02 bouyer Exp
+ * NetBSD: pcidevs,v 1.1357 2018/12/26 08:25:20 msaitoh Exp
*/
/*
@@ -4155,6 +4155,7 @@
#define PCI_PRODUCT_INTEL_XE55_QP_REG 0x2c40 /* Xeon 5500 QuickPath Generic Non-Core Register */
#define PCI_PRODUCT_INTEL_CORE_QP_REG_2 0x2c51 /* Core i7-800 and i5-700 QuickPath Generic Non-Core Register */
#define PCI_PRODUCT_INTEL_CORE_QP_REG_1 0x2c61 /* Core i5-600, i3-500 and Pentium 6000 QuickPath Generic Non-Core Register */
+#define PCI_PRODUCT_INTEL_CORE_QP_REG_3 0x2c62 /* Core QuickPath Generic Non-Core Register */
#define PCI_PRODUCT_INTEL_XE56_QP_REG 0x2c70 /* Xeon 5600 QuickPath Generic Non-Core Register */
#define PCI_PRODUCT_INTEL_CORE_QP_SAD_2 0x2c81 /* Core i7-800 and i5-700 QuickPath Generic System Address Decoder */
#define PCI_PRODUCT_INTEL_CORE_QPI_LINK_2 0x2c90 /* Core i7-800 and i5-700 QPI Link */
Index: src/sys/dev/pci/pcidevs_data.h
diff -u src/sys/dev/pci/pcidevs_data.h:1.1344 src/sys/dev/pci/pcidevs_data.h:1.1345
--- src/sys/dev/pci/pcidevs_data.h:1.1344 Mon Dec 3 18:24:18 2018
+++ src/sys/dev/pci/pcidevs_data.h Wed Dec 26 08:25:52 2018
@@ -1,10 +1,10 @@
-/* $NetBSD: pcidevs_data.h,v 1.1344 2018/12/03 18:24:18 bouyer Exp $ */
+/* $NetBSD: pcidevs_data.h,v 1.1345 2018/12/26 08:25:52 msaitoh Exp $ */
/*
* THIS FILE IS AUTOMATICALLY GENERATED. DO NOT EDIT.
*
* generated from:
- * NetBSD: pcidevs,v 1.1356 2018/12/03 18:23:02 bouyer Exp
+ * NetBSD: pcidevs,v 1.1357 2018/12/26 08:25:20 msaitoh Exp
*/
/*
@@ -7020,6 +7020,8 @@ static const uint16_t pci_products[] = {
18975, 23413, 558, 23420, 23368, 13092, 23395, 23404, 0,
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_QP_REG_1,
18975, 23427, 23435, 558, 23442, 21682, 23368, 13092, 23395, 23404, 0,
+ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_QP_REG_3,
+ 18975, 23368, 13092, 23395, 23404, 0,
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE56_QP_REG,
19518, 10707, 23368, 13092, 23395, 23404, 0,
PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_QP_SAD_2,
@@ -15179,7 +15181,7 @@ static const char pci_words[] = { "."
"L2C-CBC\0" /* 1 refs @ 13071 */
"L2C-MCI\0" /* 1 refs @ 13079 */
"SMMU\0" /* 1 refs @ 13087 */
- "Generic\0" /* 7 refs @ 13092 */
+ "Generic\0" /* 8 refs @ 13092 */
"Interrupt\0" /* 6 refs @ 13100 */
"GPIO\0" /* 6 refs @ 13110 */
"MPI\0" /* 1 refs @ 13115 */
@@ -15952,7 +15954,7 @@ static const char pci_words[] = { "."
"128M\0" /* 1 refs @ 18960 */
"Iron\0" /* 6 refs @ 18965 */
"Lake\0" /* 79 refs @ 18970 */
- "Core\0" /* 176 refs @ 18975 */
+ "Core\0" /* 177 refs @ 18975 */
"Centrino\0" /* 28 refs @ 18980 */
"Advanced-N\0" /* 10 refs @ 18989 */
"6205\0" /* 2 refs @ 19000 */
@@ -16570,12 +16572,12 @@ static const char pci_words[] = { "."
"82965PM/GM\0" /* 1 refs @ 23341 */
"82965GME\0" /* 7 refs @ 23352 */
"82GM45\0" /* 8 refs @ 23361 */
- "QuickPath\0" /* 14 refs @ 23368 */
+ "QuickPath\0" /* 15 refs @ 23368 */
"Mirror\0" /* 4 refs @ 23378 */
"Test\0" /* 3 refs @ 23385 */
"Rank\0" /* 8 refs @ 23390 */
- "Non-Core\0" /* 4 refs @ 23395 */
- "Register\0" /* 4 refs @ 23404 */
+ "Non-Core\0" /* 5 refs @ 23395 */
+ "Register\0" /* 5 refs @ 23404 */
"i7-800\0" /* 15 refs @ 23413 */
"i5-700\0" /* 15 refs @ 23420 */
"i5-600,\0" /* 6 refs @ 23427 */
