Module Name:    src
Committed By:   jmcneill
Date:           Fri Jan  4 15:57:04 UTC 2019

Modified Files:
        src/sys/arch/arm/samsung: exynos_platform.c

Log Message:
Starting CPUs in cluster 1 of Exynos5422 causes strange things to happen
around ap_mpstart. Until we figure out why, only start CPUs in cluster 0.


To generate a diff of this commit:
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/arm/samsung/exynos_platform.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/samsung/exynos_platform.c
diff -u src/sys/arch/arm/samsung/exynos_platform.c:1.21 src/sys/arch/arm/samsung/exynos_platform.c:1.22
--- src/sys/arch/arm/samsung/exynos_platform.c:1.21	Thu Jan  3 23:04:09 2019
+++ src/sys/arch/arm/samsung/exynos_platform.c	Fri Jan  4 15:57:03 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: exynos_platform.c,v 1.21 2019/01/03 23:04:09 jmcneill Exp $ */
+/* $NetBSD: exynos_platform.c,v 1.22 2019/01/04 15:57:03 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2017 Jared D. McNeill <jmcne...@invisible.ca>
@@ -35,7 +35,12 @@
 #include "ukbd.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: exynos_platform.c,v 1.21 2019/01/03 23:04:09 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: exynos_platform.c,v 1.22 2019/01/04 15:57:03 jmcneill Exp $");
+
+/* XXXJDM
+ * Booting a CA7 core on Exynos5422 is currently broken, disable starting CA7 secondaries.
+ */
+#define	EXYNOS5422_DISABLE_CA7_CLUSTER
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -60,6 +65,8 @@ __KERNEL_RCSID(0, "$NetBSD: exynos_platf
 
 #include <arm/fdt/arm_fdtvar.h>
 
+#include <libfdt.h>
+
 void exynos_platform_early_putchar(char);
 
 #define	EXYNOS5800_PMU_BASE		0x10040000
@@ -140,6 +147,11 @@ exynos5800_mpstart(void)
 		const u_int aff0 = __SHIFTOUT(mpidr, MPIDR_AFF0);
 		const u_int cpu = cluster * 4 + aff0;
 
+#if defined(EXYNOS5422_DISABLE_CA7_CLUSTER)
+		if (cluster == 1)
+			continue;
+#endif
+
 		val = bus_space_read_4(bst, pmu_bsh, EXYNOS5800_PMU_CORE_STATUS(cpu));
 		bus_space_write_4(bst, pmu_bsh, EXYNOS5800_PMU_CORE_CONFIG(cpu),
 		    EXYNOS5800_PMU_CORE_POWER_EN);
@@ -319,6 +331,27 @@ exynos5_platform_bootstrap(void)
 
 	exynos_bootstrap(5);
 
+#if defined(MULTIPROCESSOR) && defined(EXYNOS5422_DISABLE_CA7_CLUSTER)
+	const struct of_compat_data *cd = of_search_compatible(OF_finddevice("/"), mp_compat_data);
+	if (cd && cd->data == (uintptr_t)exynos5800_mpstart) {
+		void *fdt_data = __UNCONST(fdtbus_get_data());
+		int cpu_off, cpus_off, len;
+
+		cpus_off = fdt_path_offset(fdt_data, "/cpus");
+		if (cpus_off < 0)
+			return;
+
+		fdt_for_each_subnode(cpu_off, fdt_data, cpus_off) {
+			const void *prop = fdt_getprop(fdt_data, cpu_off, "reg", &len);
+			if (len != 4)
+				continue;
+			const uint32_t mpidr = be32dec(prop);
+			if (mpidr != cpu_mpidr_aff_read() && __SHIFTOUT(mpidr, MPIDR_AFF1) == 1)
+				fdt_setprop_string(fdt_data, cpu_off, "status", "fail");
+		}
+	}
+#endif
+
 	arm_fdt_cpu_bootstrap();
 }
 

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