CVS commit: src/sys/dev/mii

[SAITOH Masanobu]

Module Name:    src
Committed By:   msaitoh
Date:           Wed Feb 13 08:41:43 UTC 2019

Modified Files:
        src/sys/dev/mii: ciphy.c

Log Message:
Add CS8204, CS8244 VSC8211 and VSC8601 support from {Free,Open}BSD.


To generate a diff of this commit:
cvs rdiff -u -r1.29 -r1.30 src/sys/dev/mii/ciphy.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.


Modified files:

Index: src/sys/dev/mii/ciphy.c
diff -u src/sys/dev/mii/ciphy.c:1.29 src/sys/dev/mii/ciphy.c:1.30
--- src/sys/dev/mii/ciphy.c:1.29	Tue Jan 22 03:42:27 2019
+++ src/sys/dev/mii/ciphy.c	Wed Feb 13 08:41:43 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: ciphy.c,v 1.29 2019/01/22 03:42:27 msaitoh Exp $ */
+/* $NetBSD: ciphy.c,v 1.30 2019/02/13 08:41:43 msaitoh Exp $ */
 
 /*-
  * Copyright (c) 2004
@@ -35,7 +35,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ciphy.c,v 1.29 2019/01/22 03:42:27 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ciphy.c,v 1.30 2019/02/13 08:41:43 msaitoh Exp $");
 
 /*
  * Driver for the Cicada CS8201 10/100/1000 copper PHY.
@@ -83,6 +83,15 @@ static const struct mii_phydesc ciphys[]
 	{ MII_OUI_CICADA,		MII_MODEL_CICADA_CS8201B,
 	  MII_STR_CICADA_CS8201B },
 
+	{ MII_OUI_CICADA,		MII_MODEL_CICADA_CS8204,
+	  MII_STR_CICADA_CS8204 },
+
+	{ MII_OUI_CICADA,		MII_MODEL_CICADA_VSC8211,
+	  MII_STR_CICADA_VSC8211 },
+
+	{ MII_OUI_CICADA,		MII_MODEL_CICADA_CS8244,
+	  MII_STR_CICADA_CS8244 },
+
 	{ MII_OUI_xxCICADA,		MII_MODEL_CICADA_CS8201,
 	  MII_STR_CICADA_CS8201 },
 
@@ -92,6 +101,9 @@ static const struct mii_phydesc ciphys[]
 	{ MII_OUI_xxCICADA,		MII_MODEL_xxCICADA_CS8201B,
 	  MII_STR_xxCICADA_CS8201B },
 
+	{ MII_OUI_VITESSE,		MII_MODEL_VITESSE_VSC8601,
+	  MII_STR_VITESSE_VSC8601 },
+
 	{ 0,				0,
 	  NULL },
 };
@@ -422,6 +434,7 @@ ciphy_fixup(struct mii_softc *sc)
 
 	switch (model) {
 	case MII_MODEL_CICADA_CS8201:
+	case MII_MODEL_CICADA_CS8204:
 
 		/* Turn off "aux mode" (whatever that means) */
 		PHY_SETBIT(sc, CIPHY_MII_AUXCSR, CIPHY_AUXCSR_MDPPS);
@@ -457,6 +470,10 @@ ciphy_fixup(struct mii_softc *sc)
 		}
 
 		break;
+	case MII_MODEL_CICADA_VSC8211:
+	case MII_MODEL_CICADA_CS8244:
+	case MII_MODEL_VITESSE_VSC8601:
+		break;
 	default:
 		aprint_error_dev(sc->mii_dev, "unknown CICADA PHY model %x\n",
 		    model);