Module Name: src
Committed By: msaitoh
Date: Tue Feb 26 05:26:10 UTC 2019
Modified Files:
src/sys/dev/mii: miivar.h rgephy.c
Log Message:
Add MI MII clause 45 MMD MDIO access macros via clause 22 indirect registers:
DESCRIPTION
static inline int
MMD_INDIRECT(struct mii_softc *sc, uint16_t daddr, uint16_t regnum):
Setup MMD device address and register number. It also setup
address incrementation function.
static inline int
MMD_INDIRECT_READ(struct mii_softc *sc, uint16_t daddr, uint16_t regnum,
uint16_t *valp)):
Do MMD_INDIRECT() and then read the register.
static inline int
MMD_INDIRECT_WRITE(struct mii_softc *sc, uint16_t daddr, uint16_t regnum,
uint16_t val):
Do MMD_INDIRECT() and then write the register.
RETURN VALUE
Retruns 0 on success. Non-zero vaule on failure.
Note that old PHYs have no indirect access registers. Accessing such
devices with these functions cause timeout and return non-zero value
(e.g. ETIMEDOUT).
EXAMPLE
Read MMD Auto negotiation device's EEE advertisement register,
drop 100BASE-TX support and write it.
uint16_t eeadvert;
/* Post increment is not required */
MMD_INDIRECT_READ(sc, MDIO_MMD_AN | MMDACR_FN_DATA,
MDIO_AN_EEEADVERT, &eeadvert);
eeadvert &= ~AN_EEEADVERT_100_TX;
/*
* MMD device address and the register number are already set, so it's
* enough to read MII_MMDACR.
*/
PHY_WRITE(sc. MII_MMDACR, eeadvert);
To generate a diff of this commit:
cvs rdiff -u -r1.65 -r1.66 src/sys/dev/mii/miivar.h
cvs rdiff -u -r1.50 -r1.51 src/sys/dev/mii/rgephy.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/mii/miivar.h
diff -u src/sys/dev/mii/miivar.h:1.65 src/sys/dev/mii/miivar.h:1.66
--- src/sys/dev/mii/miivar.h:1.65 Sun Feb 24 17:22:21 2019
+++ src/sys/dev/mii/miivar.h Tue Feb 26 05:26:10 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: miivar.h,v 1.65 2019/02/24 17:22:21 christos Exp $ */
+/* $NetBSD: miivar.h,v 1.66 2019/02/26 05:26:10 msaitoh Exp $ */
/*-
* Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
@@ -36,6 +36,7 @@
#include <sys/queue.h>
#include <sys/callout.h>
+#include <dev/mii/mii.h>
#include <dev/mii/mii_verbose.h>
/*
@@ -222,6 +223,57 @@ struct mii_media {
(*(p)->mii_pdata->mii_writereg)(device_parent((p)->mii_dev), \
(p)->mii_phy, (r), (v))
+/*
+ * Setup MDD indirect access. Set device address and register number.
+ * "addr" variable takes an address ORed with the function (MMDACR_FN_*).
+ *
+ */
+static inline int
+MMD_INDIRECT(struct mii_softc *sc, uint16_t daddr, uint16_t regnum)
+{
+ int rv;
+
+ /*
+ * Set the MMD device address and set the access mode (function)
+ * to address.
+ */
+ if ((rv = PHY_WRITE(sc, MII_MMDACR, (daddr & ~MMDACR_FUNCMASK))) != 0)
+ return rv;
+
+ /* Set the register number */
+ if ((rv = PHY_WRITE(sc, MII_MMDAADR, regnum)) != 0)
+ return rv;
+
+ /* Set the access mode (function) */
+ rv = PHY_WRITE(sc, MII_MMDACR, daddr);
+
+ return rv;
+}
+
+static inline int
+MMD_INDIRECT_READ(struct mii_softc *sc, uint16_t daddr, uint16_t regnum,
+ uint16_t *valp)
+{
+ int rv;
+
+ if ((rv = MMD_INDIRECT(sc, daddr, regnum)) != 0)
+ return rv;
+
+ return PHY_READ(sc, MII_MMDAADR, valp);
+}
+
+static inline int
+MMD_INDIRECT_WRITE(struct mii_softc *sc, uint16_t daddr, uint16_t regnum,
+ uint16_t val)
+{
+ int rv;
+
+ if ((rv = MMD_INDIRECT(sc, daddr, regnum)) != 0)
+ return rv;
+
+ return PHY_WRITE(sc, MII_MMDAADR, val);
+}
+
#define PHY_SERVICE(p, d, o) \
(*(p)->mii_funcs->pf_service)((p), (d), (o))
Index: src/sys/dev/mii/rgephy.c
diff -u src/sys/dev/mii/rgephy.c:1.50 src/sys/dev/mii/rgephy.c:1.51
--- src/sys/dev/mii/rgephy.c:1.50 Mon Feb 25 07:36:16 2019
+++ src/sys/dev/mii/rgephy.c Tue Feb 26 05:26:10 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: rgephy.c,v 1.50 2019/02/25 07:36:16 msaitoh Exp $ */
+/* $NetBSD: rgephy.c,v 1.51 2019/02/26 05:26:10 msaitoh Exp $ */
/*
* Copyright (c) 2003
@@ -33,7 +33,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rgephy.c,v 1.50 2019/02/25 07:36:16 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rgephy.c,v 1.51 2019/02/26 05:26:10 msaitoh Exp $");
/*
@@ -700,9 +700,7 @@ rgephy_reset(struct mii_softc *sc)
/* RTL8211F */
delay(10000);
/* disable EEE */
- PHY_WRITE(sc, MII_MMDACR, MMDACR_FN_ADDRESS | MDIO_MMD_AN);
- PHY_WRITE(sc, MII_MMDAADR, MDIO_AN_EEEADVERT);
- PHY_WRITE(sc, MII_MMDACR, MMDACR_FN_DATA | MDIO_MMD_AN);
- PHY_WRITE(sc, MII_MMDAADR, 0x0000);
+ MMD_INDIRECT_WRITE(sc, MDIO_MMD_AN | MMDACR_FN_DATA,
+ MDIO_AN_EEEADVERT, 0x0000);
}
}
