Module Name:    src
Committed By:   msaitoh
Date:           Thu Apr 11 09:14:07 UTC 2019

Modified Files:
        src/sys/dev/mii: brgphyreg.h ciphy.c mii.h miivar.h rgephy.c

Log Message:
 KNF. No functional change.


To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/dev/mii/brgphyreg.h
cvs rdiff -u -r1.33 -r1.34 src/sys/dev/mii/ciphy.c
cvs rdiff -u -r1.26 -r1.27 src/sys/dev/mii/mii.h
cvs rdiff -u -r1.67 -r1.68 src/sys/dev/mii/miivar.h
cvs rdiff -u -r1.53 -r1.54 src/sys/dev/mii/rgephy.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/mii/brgphyreg.h
diff -u src/sys/dev/mii/brgphyreg.h:1.10 src/sys/dev/mii/brgphyreg.h:1.11
--- src/sys/dev/mii/brgphyreg.h:1.10	Wed Jan 16 07:32:13 2019
+++ src/sys/dev/mii/brgphyreg.h	Thu Apr 11 09:14:07 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: brgphyreg.h,v 1.10 2019/01/16 07:32:13 msaitoh Exp $	*/
+/*	$NetBSD: brgphyreg.h,v 1.11 2019/04/11 09:14:07 msaitoh Exp $	*/
 
 /*
  * Copyright (c) 2000
@@ -323,6 +323,6 @@
 /*******************************************************/
 
 #define BRGPHY_INTRS	\
-	~(BRGPHY_IMR_LNK_CHG|BRGPHY_IMR_LSP_CHG|BRGPHY_IMR_DUP_CHG)
+	~(BRGPHY_IMR_LNK_CHG | BRGPHY_IMR_LSP_CHG | BRGPHY_IMR_DUP_CHG)
 
 #endif /* _DEV_BRGPHY_MIIREG_H_ */

Index: src/sys/dev/mii/ciphy.c
diff -u src/sys/dev/mii/ciphy.c:1.33 src/sys/dev/mii/ciphy.c:1.34
--- src/sys/dev/mii/ciphy.c:1.33	Thu Apr 11 08:50:20 2019
+++ src/sys/dev/mii/ciphy.c	Thu Apr 11 09:14:07 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: ciphy.c,v 1.33 2019/04/11 08:50:20 msaitoh Exp $ */
+/* $NetBSD: ciphy.c,v 1.34 2019/04/11 09:14:07 msaitoh Exp $ */
 
 /*-
  * Copyright (c) 2004
@@ -35,7 +35,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ciphy.c,v 1.33 2019/04/11 08:50:20 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ciphy.c,v 1.34 2019/04/11 09:14:07 msaitoh Exp $");
 
 /*
  * Driver for the Cicada CS8201 10/100/1000 copper PHY.
@@ -212,9 +212,8 @@ setit:
 			if ((mii->mii_ifp->if_flags & IFF_LINK0)) {
 				PHY_WRITE(sc, MII_GTCR,
 				    gig | GTCR_MAN_MS | GTCR_ADV_MS);
-			} else {
+			} else
 				PHY_WRITE(sc, MII_GTCR, gig | GTCR_MAN_MS);
-			}
 			break;
 		case IFM_NONE:
 			PHY_WRITE(sc, MII_BMCR, BMCR_ISO | BMCR_PDOWN);
@@ -398,7 +397,6 @@ ciphy_fixup(struct mii_softc *sc)
 	switch (model) {
 	case MII_MODEL_CICADA_CS8201:
 	case MII_MODEL_CICADA_CS8204:
-
 		/* Turn off "aux mode" (whatever that means) */
 		PHY_SETBIT(sc, CIPHY_MII_AUXCSR, CIPHY_AUXCSR_MDPPS);
 
@@ -407,11 +405,10 @@ ciphy_fixup(struct mii_softc *sc)
 		 * when using MII in full duplex mode.
 		 */
 		if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) &&
-		    (status & CIPHY_AUXCSR_FDX)) {
+		    (status & CIPHY_AUXCSR_FDX))
 			PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
-		} else {
+		else
 			PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
-		}
 
 		/* Enable link/activity LED blink. */
 		PHY_SETBIT(sc, CIPHY_MII_LED, CIPHY_LED_LINKACTBLINK);
@@ -420,15 +417,14 @@ ciphy_fixup(struct mii_softc *sc)
 
 	case MII_MODEL_CICADA_CS8201A:
 	case MII_MODEL_CICADA_CS8201B:
-
 		/*
 		 * Work around speed polling bug in VT3119/VT3216
 		 * when using MII in full duplex mode.
 		 */
 		if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) &&
-		    (status & CIPHY_AUXCSR_FDX)) {
+		    (status & CIPHY_AUXCSR_FDX))
 			PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
-		} else
+		else
 			PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
 
 		break;

Index: src/sys/dev/mii/mii.h
diff -u src/sys/dev/mii/mii.h:1.26 src/sys/dev/mii/mii.h:1.27
--- src/sys/dev/mii/mii.h:1.26	Mon Feb 25 07:36:16 2019
+++ src/sys/dev/mii/mii.h	Thu Apr 11 09:14:07 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: mii.h,v 1.26 2019/02/25 07:36:16 msaitoh Exp $	*/
+/*	$NetBSD: mii.h,v 1.27 2019/04/11 09:14:07 msaitoh Exp $	*/
 
 /*
  * Copyright (c) 1997 Manuel Bouyer.  All rights reserved.
@@ -64,7 +64,7 @@
 #define	BMCR_S100	BMCR_SPEED0	/* 100 Mb/s */
 #define	BMCR_S1000	BMCR_SPEED1	/* 1000 Mb/s */
 
-#define	BMCR_SPEED(x)	((x) & (BMCR_SPEED0|BMCR_SPEED1))
+#define	BMCR_SPEED(x)	((x) & (BMCR_SPEED0 | BMCR_SPEED1))
 
 #define	MII_BMSR	0x01	/* Basic mode status register (ro) */
 #define	BMSR_100T4	0x8000	/* 100 base T4 capable */
@@ -90,8 +90,8 @@
  * states that all 1000 Mb/s capable PHYs will set this bit to 1.
  */
 
-#define	BMSR_MEDIAMASK	(BMSR_100T4|BMSR_100TXFDX|BMSR_100TXHDX| \
-			 BMSR_10TFDX|BMSR_10THDX|BMSR_100T2FDX|BMSR_100T2HDX)
+#define	BMSR_MEDIAMASK	(BMSR_100T4 | BMSR_100TXFDX | BMSR_100TXHDX | \
+	    BMSR_10TFDX | BMSR_10THDX | BMSR_100T2FDX | BMSR_100T2HDX)
 
 /*
  * Convert BMSR media capabilities to ANAR bits for autonegotiation.
@@ -304,7 +304,7 @@
 #define	EXTSR_1000TFDX	0x2000	/* 1000T full-duplex capable */
 #define	EXTSR_1000THDX	0x1000	/* 1000T half-duplex capable */
 
-#define	EXTSR_MEDIAMASK	(EXTSR_1000XFDX|EXTSR_1000XHDX| \
-			 EXTSR_1000TFDX|EXTSR_1000THDX)
+#define	EXTSR_MEDIAMASK	(EXTSR_1000XFDX | EXTSR_1000XHDX | \
+	    EXTSR_1000TFDX | EXTSR_1000THDX)
 
 #endif /* _DEV_MII_MII_H_ */

Index: src/sys/dev/mii/miivar.h
diff -u src/sys/dev/mii/miivar.h:1.67 src/sys/dev/mii/miivar.h:1.68
--- src/sys/dev/mii/miivar.h:1.67	Tue Apr  9 11:28:45 2019
+++ src/sys/dev/mii/miivar.h	Thu Apr 11 09:14:07 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: miivar.h,v 1.67 2019/04/09 11:28:45 msaitoh Exp $	*/
+/*	$NetBSD: miivar.h,v 1.68 2019/04/11 09:14:07 msaitoh Exp $	*/
 
 /*-
  * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
@@ -72,15 +72,11 @@ struct mii_data {
 	LIST_HEAD(mii_listhead, mii_softc) mii_phys;
 	u_int mii_instance;
 
-	/*
-	 * PHY driver fills this in with active media status.
-	 */
+	/* PHY driver fills this in with active media status. */
 	int mii_media_status;
 	u_int mii_media_active;
 
-	/*
-	 * Calls from MII layer into network interface driver.
-	 */
+	/* Calls from MII layer into network interface driver. */
 	mii_readreg_t mii_readreg;
 	mii_writereg_t mii_writereg;
 	mii_statchg_t mii_statchg;
@@ -156,7 +152,7 @@ typedef struct mii_softc mii_softc_t;
 #define	MIIF_IS_HPNA	0x0200		/* is a HomePNA device */
 #define	MIIF_FORCEANEG	0x0400		/* force auto-negotiation */
 
-#define	MIIF_INHERIT_MASK	(MIIF_NOISOLATE|MIIF_NOLOOP|MIIF_AUTOTSLEEP)
+#define	MIIF_INHERIT_MASK (MIIF_NOISOLATE | MIIF_NOLOOP | MIIF_AUTOTSLEEP)
 
 /*
  * Special `locators' passed to mii_attach().  If one of these is not

Index: src/sys/dev/mii/rgephy.c
diff -u src/sys/dev/mii/rgephy.c:1.53 src/sys/dev/mii/rgephy.c:1.54
--- src/sys/dev/mii/rgephy.c:1.53	Thu Apr 11 08:50:20 2019
+++ src/sys/dev/mii/rgephy.c	Thu Apr 11 09:14:07 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: rgephy.c,v 1.53 2019/04/11 08:50:20 msaitoh Exp $	*/
+/*	$NetBSD: rgephy.c,v 1.54 2019/04/11 09:14:07 msaitoh Exp $	*/
 
 /*
  * Copyright (c) 2003
@@ -33,7 +33,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rgephy.c,v 1.53 2019/04/11 08:50:20 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rgephy.c,v 1.54 2019/04/11 09:14:07 msaitoh Exp $");
 
 
 /*
@@ -259,9 +259,8 @@ rgephy_service(struct mii_softc *sc, str
 			if ((mii->mii_ifp->if_flags & IFF_LINK0)) {
 				PHY_WRITE(sc, MII_100T2CR,
 				    gig | GTCR_MAN_MS | GTCR_ADV_MS);
-			} else {
+			} else
 				PHY_WRITE(sc, MII_100T2CR, gig | GTCR_MAN_MS);
-			}
 			PHY_WRITE(sc, MII_BMCR,
 			    speed | BMCR_AUTOEN | BMCR_STARTNEG);
 			break;
@@ -339,7 +338,6 @@ rgephy_service(struct mii_softc *sc, str
 	/*
 	 * Callback if something changed. Note that we need to poke
 	 * the DSP on the RealTek PHYs if the media changes.
-	 *
 	 */
 	if (sc->mii_media_active != mii->mii_media_active ||
 	    sc->mii_media_status != mii->mii_media_status ||

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