Module Name: src
Committed By: cliff
Date: Wed Jan 13 09:42:38 UTC 2010
Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: mips_machdep.c
Log Message:
- spec CIDFL's for RMI L2, cores, threads attributes
- add cputab[] entry for RMI XLS404LITE
- cpu_identify() now gets device_t arg; use it instead of static 'label'
To generate a diff of this commit:
cvs rdiff -u -r1.205.4.1.2.1.2.21 -r1.205.4.1.2.1.2.22 \
src/sys/arch/mips/mips/mips_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/mips_machdep.c
diff -u src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.21 src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.22
--- src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.21 Sat Jan 9 06:01:18 2010
+++ src/sys/arch/mips/mips/mips_machdep.c Wed Jan 13 09:42:38 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: mips_machdep.c,v 1.205.4.1.2.1.2.21 2010/01/09 06:01:18 matt Exp $ */
+/* $NetBSD: mips_machdep.c,v 1.205.4.1.2.1.2.22 2010/01/13 09:42:38 cliff Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -112,7 +112,7 @@
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.205.4.1.2.1.2.21 2010/01/09 06:01:18 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.205.4.1.2.1.2.22 2010/01/13 09:42:38 cliff Exp $");
#include "opt_cputype.h"
#include "opt_compat_netbsd32.h"
@@ -456,28 +456,40 @@
CPU_MIPS_HAVE_MxCR,
MIPS_CP0FL_USE |MIPS_CP0FL_EIRR | MIPS_CP0FL_EIMR | MIPS_CP0FL_EBASE |
MIPS_CP0FL_CONFIGn(0) | MIPS_CP0FL_CONFIGn(1) | MIPS_CP0FL_CONFIGn(7),
- CIDFL_RMI_TYPE_XLS, "XLS616" },
+ CIDFL_RMI_TYPE_XLS|MIPS_CIDFL_RMI_CPUS(4,4)|MIPS_CIDFL_RMI_L2(1MB),
+ "XLS616" },
{ MIPS_PRID_CID_RMI, MIPS_XLS416, -1, -1, -1, 0,
MIPS64_FLAGS | CPU_MIPS_D_CACHE_COHERENT | CPU_MIPS_NO_LLADDR |
CPU_MIPS_HAVE_MxCR,
MIPS_CP0FL_USE |MIPS_CP0FL_EIRR | MIPS_CP0FL_EIMR | MIPS_CP0FL_EBASE |
MIPS_CP0FL_CONFIGn(0) | MIPS_CP0FL_CONFIGn(1) | MIPS_CP0FL_CONFIGn(7),
- CIDFL_RMI_TYPE_XLS, "XLS416" },
+ CIDFL_RMI_TYPE_XLS|MIPS_CIDFL_RMI_CPUS(4,4)|MIPS_CIDFL_RMI_L2(1MB),
+ "XLS416" },
{ MIPS_PRID_CID_RMI, MIPS_XLS408, -1, -1, -1, 0,
MIPS64_FLAGS | CPU_MIPS_D_CACHE_COHERENT | CPU_MIPS_NO_LLADDR |
CPU_MIPS_HAVE_MxCR,
MIPS_CP0FL_USE |MIPS_CP0FL_EIRR | MIPS_CP0FL_EIMR | MIPS_CP0FL_EBASE |
MIPS_CP0FL_CONFIGn(0) | MIPS_CP0FL_CONFIGn(1) | MIPS_CP0FL_CONFIGn(7),
- CIDFL_RMI_TYPE_XLS, "XLS408" },
+ CIDFL_RMI_TYPE_XLS|MIPS_CIDFL_RMI_CPUS(2,4)|MIPS_CIDFL_RMI_L2(1MB),
+ "XLS408" },
{ MIPS_PRID_CID_RMI, MIPS_XLS408LITE, -1, -1, -1, 0,
MIPS64_FLAGS | CPU_MIPS_D_CACHE_COHERENT | CPU_MIPS_NO_LLADDR |
CPU_MIPS_HAVE_MxCR,
MIPS_CP0FL_USE |MIPS_CP0FL_EIRR | MIPS_CP0FL_EIMR | MIPS_CP0FL_EBASE |
MIPS_CP0FL_CONFIGn(0) | MIPS_CP0FL_CONFIGn(1) | MIPS_CP0FL_CONFIGn(7),
- CIDFL_RMI_TYPE_XLS, "XLS408LITE" },
+ CIDFL_RMI_TYPE_XLS|MIPS_CIDFL_RMI_CPUS(2,4)|MIPS_CIDFL_RMI_L2(1MB),
+ "XLS408LITE" },
+
+ { MIPS_PRID_CID_RMI, MIPS_XLS404LITE, -1, -1, -1, 0,
+ MIPS64_FLAGS | CPU_MIPS_D_CACHE_COHERENT | CPU_MIPS_NO_LLADDR |
+ CPU_MIPS_HAVE_MxCR,
+ MIPS_CP0FL_USE |MIPS_CP0FL_EIRR | MIPS_CP0FL_EIMR | MIPS_CP0FL_EBASE |
+ MIPS_CP0FL_CONFIGn(0) | MIPS_CP0FL_CONFIGn(1) | MIPS_CP0FL_CONFIGn(7),
+ CIDFL_RMI_TYPE_XLS|MIPS_CIDFL_RMI_CPUS(1,4)|MIPS_CIDFL_RMI_L2(512KB),
+ "XLS404LITE" },
{ 0, 0, 0, 0, 0, 0,
0, 0, 0, NULL }
@@ -1065,7 +1077,7 @@
* Identify product revision IDs of CPU and FPU.
*/
void
-cpu_identify(void)
+cpu_identify(device_t dev)
{
static const char * const waynames[] = {
"fully set-associative", /* 0 */
@@ -1083,7 +1095,7 @@
"write-back",
"write-through",
};
- static const char * const label = "cpu0"; /* XXX */
+ const char *label = device_xname(dev);
const char *cpuname, *fpuname;
int i;
@@ -1139,8 +1151,8 @@
MIPS_PRID_RSVD(cpu_id) != 0) {
printf("%s: NOTE: top 8 bits of prehistoric PRID not 0!\n",
label);
- printf("%s: Please mail [email protected] with cpu0 "
- "dmesg lines.\n", label);
+ printf("%s: Please mail [email protected] with %s "
+ "dmesg lines.\n", label, label);
}
KASSERT(mips_picache_ways < nwaynames);
