Module Name: src
Committed By: mrg
Date: Thu May 9 07:38:44 UTC 2019
Modified Files:
src/sys/arch/aarch64/aarch64: cpu.c
src/sys/arch/arm/include: cputypes.h
src/usr.sbin/cpuctl/arch: aarch64.c
Log Message:
add cortex A-76 detection.
To generate a diff of this commit:
cvs rdiff -u -r1.16 -r1.17 src/sys/arch/aarch64/aarch64/cpu.c
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/include/cputypes.h
cvs rdiff -u -r1.6 -r1.7 src/usr.sbin/cpuctl/arch/aarch64.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/cpu.c
diff -u src/sys/arch/aarch64/aarch64/cpu.c:1.16 src/sys/arch/aarch64/aarch64/cpu.c:1.17
--- src/sys/arch/aarch64/aarch64/cpu.c:1.16 Mon Jan 21 08:04:26 2019
+++ src/sys/arch/aarch64/aarch64/cpu.c Thu May 9 07:38:44 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.16 2019/01/21 08:04:26 skrll Exp $ */
+/* $NetBSD: cpu.c,v 1.17 2019/05/09 07:38:44 mrg Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu <[email protected]>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.16 2019/01/21 08:04:26 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.17 2019/05/09 07:38:44 mrg Exp $");
#include "locators.h"
#include "opt_arm_debug.h"
@@ -190,6 +190,7 @@ const struct cpuidtab cpuids[] = {
{ CPU_ID_CORTEXA73R0 & CPU_PARTMASK, "Cortex-A73", "Cortex", "V8-A" },
{ CPU_ID_CORTEXA55R1 & CPU_PARTMASK, "Cortex-A55", "Cortex", "V8.2-A" },
{ CPU_ID_CORTEXA75R2 & CPU_PARTMASK, "Cortex-A75", "Cortex", "V8.2-A" },
+ { CPU_ID_CORTEXA76R3 & CPU_PARTMASK, "Cortex-A76", "Cortex", "V8.2-A" },
{ CPU_ID_THUNDERXRX, "Cavium ThunderX", "Cavium", "V8-A" },
{ CPU_ID_THUNDERX81XXRX, "Cavium ThunderX CN81XX", "Cavium", "V8-A" },
{ CPU_ID_THUNDERX83XXRX, "Cavium ThunderX CN83XX", "Cavium", "V8-A" },
Index: src/sys/arch/arm/include/cputypes.h
diff -u src/sys/arch/arm/include/cputypes.h:1.5 src/sys/arch/arm/include/cputypes.h:1.6
--- src/sys/arch/arm/include/cputypes.h:1.5 Thu Jan 3 15:10:37 2019
+++ src/sys/arch/arm/include/cputypes.h Thu May 9 07:38:44 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: cputypes.h,v 1.5 2019/01/03 15:10:37 jmcneill Exp $ */
+/* $NetBSD: cputypes.h,v 1.6 2019/05/09 07:38:44 mrg Exp $ */
/*
* Copyright (c) 1998, 2001 Ben Harris
@@ -163,6 +163,7 @@
#define CPU_ID_CORTEXA72R0 0x410fd080
#define CPU_ID_CORTEXA73R0 0x410fd090
#define CPU_ID_CORTEXA75R2 0x412fd0a0
+#define CPU_ID_CORTEXA76R3 0x413fd0b0
#define CPU_ID_CORTEX_P(n) ((n & 0xff0fe000) == 0x410fc000)
#define CPU_ID_CORTEX_A5_P(n) ((n & 0xff0ff0f0) == 0x410fc050)
@@ -177,6 +178,7 @@
#define CPU_ID_CORTEX_A72_P(n) ((n & 0xff0ff0f0) == 0x410fd080)
#define CPU_ID_CORTEX_A73_P(n) ((n & 0xff0ff0f0) == 0x410fd090)
#define CPU_ID_CORTEX_A75_P(n) ((n & 0xff0ff0f0) == 0x410fd0a0)
+#define CPU_ID_CORTEX_A76_P(n) ((n & 0xff0ff0f0) == 0x410fd0b0)
#define CPU_ID_THUNDERXRX 0x43000a10
#define CPU_ID_THUNDERXP1d0 0x43000a10
Index: src/usr.sbin/cpuctl/arch/aarch64.c
diff -u src/usr.sbin/cpuctl/arch/aarch64.c:1.6 src/usr.sbin/cpuctl/arch/aarch64.c:1.7
--- src/usr.sbin/cpuctl/arch/aarch64.c:1.6 Wed Jan 23 07:41:54 2019
+++ src/usr.sbin/cpuctl/arch/aarch64.c Thu May 9 07:38:44 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: aarch64.c,v 1.6 2019/01/23 07:41:54 skrll Exp $ */
+/* $NetBSD: aarch64.c,v 1.7 2019/05/09 07:38:44 mrg Exp $ */
/*
* Copyright (c) 2018 Ryo Shimizu <[email protected]>
@@ -29,7 +29,7 @@
#include <sys/cdefs.h>
#ifndef lint
-__RCSID("$NetBSD: aarch64.c,v 1.6 2019/01/23 07:41:54 skrll Exp $");
+__RCSID("$NetBSD: aarch64.c,v 1.7 2019/05/09 07:38:44 mrg Exp $");
#endif /* no lint */
#include <sys/types.h>
@@ -75,6 +75,7 @@ const struct cpuidtab cpuids[] = {
{ CPU_ID_CORTEXA73R0 & CPU_PARTMASK, "Cortex-A73", "Cortex", "V8-A" },
{ CPU_ID_CORTEXA55R1 & CPU_PARTMASK, "Cortex-A55", "Cortex", "V8.2-A" },
{ CPU_ID_CORTEXA75R2 & CPU_PARTMASK, "Cortex-A75", "Cortex", "V8.2-A" },
+ { CPU_ID_CORTEXA76R3 & CPU_PARTMASK, "Cortex-A76", "Cortex", "V8.2-A" },
{ CPU_ID_THUNDERXRX, "Cavium ThunderX", "Cavium", "V8-A" },
{ CPU_ID_THUNDERX81XXRX, "Cavium ThunderX CN81XX", "Cavium", "V8-A" },
{ CPU_ID_THUNDERX83XXRX, "Cavium ThunderX CN83XX", "Cavium", "V8-A" },
