Module Name: src
Committed By: msaitoh
Date: Wed Dec 11 09:12:29 UTC 2019
Modified Files:
src/sys/dev/pci: if_wm.c if_wmreg.h
Log Message:
No functional change:
- Add defintion of CONNSW register and PCS_NPTX (not used yet).
- Add some bit definitions of PCS_LCTL.
- Renae macro.
- Fix comment. Add comment.
- KNF.
To generate a diff of this commit:
cvs rdiff -u -r1.651 -r1.652 src/sys/dev/pci/if_wm.c
cvs rdiff -u -r1.115 -r1.116 src/sys/dev/pci/if_wmreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/pci/if_wm.c
diff -u src/sys/dev/pci/if_wm.c:1.651 src/sys/dev/pci/if_wm.c:1.652
--- src/sys/dev/pci/if_wm.c:1.651 Mon Dec 9 02:30:30 2019
+++ src/sys/dev/pci/if_wm.c Wed Dec 11 09:12:29 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: if_wm.c,v 1.651 2019/12/09 02:30:30 msaitoh Exp $ */
+/* $NetBSD: if_wm.c,v 1.652 2019/12/11 09:12:29 msaitoh Exp $ */
/*
* Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
@@ -82,7 +82,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.651 2019/12/09 02:30:30 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.652 2019/12/11 09:12:29 msaitoh Exp $");
#ifdef _KERNEL_OPT
#include "opt_net_mpsafe.h"
@@ -12370,6 +12370,7 @@ wm_sfp_get_media_type(struct wm_softc *s
}
if (rv != 0)
goto out;
+
switch (val) {
case SFF_SFP_ID_SFF:
aprint_normal_dev(sc->sc_dev,
@@ -12385,9 +12386,8 @@ wm_sfp_get_media_type(struct wm_softc *s
}
rv = wm_sfp_read_data_byte(sc, SFF_SFP_ETH_FLAGS_OFF, &val);
- if (rv != 0) {
+ if (rv != 0)
goto out;
- }
if ((val & (SFF_SFP_ETH_FLAGS_1000SX | SFF_SFP_ETH_FLAGS_1000LX)) != 0)
mediatype = WM_MEDIATYPE_SERDES;
Index: src/sys/dev/pci/if_wmreg.h
diff -u src/sys/dev/pci/if_wmreg.h:1.115 src/sys/dev/pci/if_wmreg.h:1.116
--- src/sys/dev/pci/if_wmreg.h:1.115 Tue Jul 23 09:37:08 2019
+++ src/sys/dev/pci/if_wmreg.h Wed Dec 11 09:12:29 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: if_wmreg.h,v 1.115 2019/07/23 09:37:08 msaitoh Exp $ */
+/* $NetBSD: if_wmreg.h,v 1.116 2019/12/11 09:12:29 msaitoh Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -435,7 +435,7 @@ struct livengood_tcpip_ctxdesc {
#define CTRL_D_UD_EN (1U << 13) /* Dock/Undock enable */
#define CTRL_D_UD_POL (1U << 14) /* Defined polarity of Dock/Undock indication in SDP[0] */
#define CTRL_F_PHY_R (1U << 15) /* Reset both PHY ports, through PHYRST_N pin */
-#define CTRL_EXT_LINK_EN (1U << 16) /* enable link status from external LINK_0 and LINK_1 pins */
+#define CTRL_EXTLINK_EN (1U << 16) /* enable link status from external LINK_0 and LINK_1 pins */
#define CTRL_LANPHYPC_OVERRIDE (1U << 16) /* SW control of LANPHYPC */
#define CTRL_LANPHYPC_VALUE (1U << 17) /* SW value of LANPHYPC */
#define CTRL_SWDPINS_SHIFT 18
@@ -639,6 +639,14 @@ struct livengood_tcpip_ctxdesc {
#define KUMCTRLSTA_OPMODE_MASK 0x000c
#define KUMCTRLSTA_OPMODE_INBAND_MDIO 0x0004
+#define WMREG_CONNSW 0x0034 /* Copper/Fiber Switch Control (>= 82575) */
+#define CONNSW_AUTOSENSE_EN __BIT(0) /* Auto Sense Enable */
+#define CONNSW_AUTOSENSE_CONF __BIT(1) /* Auto Sense Config Mode */
+#define CONNSW_ENRGSRC __BIT(2) /* SerDes Energy Detect Src */
+#define CONNSW_SERDESD __BIT(9) /* SerDes Signal Detect Ind. */
+#define CONNSW_PHYSD __BIT(10) /* PHY Signal Detect Ind. */
+#define CONNSW_PHY_PDN __BIT(11) /* Internal PHY in powerdown */
+
#define WMREG_VET 0x0038 /* VLAN Ethertype */
#define WMREG_MDPHYA 0x003c /* PHY address - RW */
@@ -1153,13 +1161,23 @@ struct livengood_tcpip_ctxdesc {
#define PCS_CFG_PCS_EN __BIT(3)
#define WMREG_PCS_LCTL 0x4208 /* PCS Link Control */
-#define PCS_LCTL_FSV_1000 __BIT(2) /* AN Timeout Enable */
-#define PCS_LCTL_FDV_FULL __BIT(3) /* AN Timeout Enable */
-#define PCS_LCTL_FSD __BIT(4) /* AN Timeout Enable */
-#define PCS_LCTL_FORCE_FC __BIT(7) /* AN Timeout Enable */
-#define PCS_LCTL_AN_ENABLE __BIT(16) /* AN Timeout Enable */
-#define PCS_LCTL_AN_RESTART __BIT(17) /* AN Timeout Enable */
-#define PCS_LCTL_AN_TIMEOUT __BIT(18) /* AN Timeout Enable */
+#define PCS_LCTL_FLV_LINK_UP __BIT(0) /* Forced Link Value */
+#define PCS_LCTL_FSV_MASK __BITS(2, 1) /* Forced Speed Value */
+#define PCS_LCTL_FSV_10 0 /* 10Mbps */
+#define PCS_LCTL_FSV_100 __BIT(1) /* 100Mbps */
+#define PCS_LCTL_FSV_1000 __BIT(2) /* 1Gpbs */
+#define PCS_LCTL_FDV_FULL __BIT(3) /* Force Duplex Value */
+#define PCS_LCTL_FSD __BIT(4) /* Force Speed and Duplex */
+#define PCS_LCTL_FORCE_LINK __BIT(5) /* Force Link */
+#define PCS_LCTL_LINK_LATCH_LOW __BIT(6) /* Link Latch Low */
+#define PCS_LCTL_FORCE_FC __BIT(7) /* Force Flow Control */
+#define PCS_LCTL_AN_ENABLE __BIT(16) /* AN enable */
+#define PCS_LCTL_AN_RESTART __BIT(17) /* AN restart */
+#define PCS_LCTL_AN_TIMEOUT __BIT(18) /* AN Timeout Enable */
+#define PCS_LCTL_AN_SGMII_BYP __BIT(19) /* AN SGMII Bypass */
+#define PCS_LCTL_AN_SGMII_TRIG __BIT(20) /* AN SGMII Trigger */
+#define PCS_LCTL_FAST_LINKTIMER __BIT(24) /* Fast Link Timer */
+#define PCS_LCTL_LINK_OK_FIX_EN __BIT(25) /* Link OK Fix Enable */
#define WMREG_PCS_LSTS 0x420c /* PCS Link Status */
#define PCS_LSTS_LINKOK __BIT(0)
@@ -1172,6 +1190,7 @@ struct livengood_tcpip_ctxdesc {
#define WMREG_PCS_ANADV 0x4218 /* AN Advertsement */
#define WMREG_PCS_LPAB 0x421c /* Link Partnet Ability */
+#define WMREG_PCS_NPTX 0x4220 /* Next Page Transmit */
#define WMREG_RXCSUM 0x5000 /* Receive Checksum register */
#define RXCSUM_PCSS 0x000000ff /* Packet Checksum Start */
@@ -1424,7 +1443,7 @@ struct livengood_tcpip_ctxdesc {
#define NVM_CFG1_LSSID (1U << 1)
#define NVM_CFG1_PME_CLOCK (1U << 2)
#define NVM_CFG1_PM (1U << 3)
-#define NVM_CFG1_ILOS (1U << 4)
+#define NVM_CFG1_ILOS (1U << 4) /* Invert loss of signal */
#define NVM_CFG1_SWDPIO_SHIFT 5
#define NVM_CFG1_SWDPIO_MASK (0xf << NVM_CFG1_SWDPIO_SHIFT)
#define NVM_CFG1_IPS1 (1U << 8)
