Module Name: src
Committed By: skrll
Date: Sat Jan 16 13:59:42 UTC 2010
Modified Files:
src/sys/arch/hppa/include: pte.h
Log Message:
Add a couple of comments and some whitespace.
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/hppa/include/pte.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/hppa/include/pte.h
diff -u src/sys/arch/hppa/include/pte.h:1.3 src/sys/arch/hppa/include/pte.h:1.4
--- src/sys/arch/hppa/include/pte.h:1.3 Thu Apr 30 07:01:27 2009
+++ src/sys/arch/hppa/include/pte.h Sat Jan 16 13:59:42 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: pte.h,v 1.3 2009/04/30 07:01:27 skrll Exp $ */
+/* $NetBSD: pte.h,v 1.4 2010/01/16 13:59:42 skrll Exp $ */
/* $OpenBSD: pte.h,v 1.11 2002/09/05 18:41:19 mickey Exp $ */
@@ -40,6 +40,7 @@
#define PTE_PAGE(pte) ((pte) & ~PGOFSET)
/* TLB access/protection values */
+/* 0x80000000 has no pt_entry_t equivalent */
#define TLB_WIRED 0x40000000 /* software only */
#define TLB_REFTRAP 0x20000000 /* bit 2, T */
#define TLB_DIRTY 0x10000000 /* bit 3, D */
@@ -55,30 +56,31 @@
#define TLB_AR_RW TLB_READ|TLB_WRITE
#define TLB_AR_RX TLB_READ|TLB_EXECUTE
#define TLB_AR_RWX TLB_READ|TLB_WRITE|TLB_EXECUTE
-#define TLB_UNCACHEABLE 0x00080000 /* bit 12, U */
+#define TLB_UNCACHEABLE 0x00080000 /* bit 12, U */
/* bit 13-30, Access ID */
-#define TLB_PID_MASK 0x0000fffe
+#define TLB_PID_MASK 0x0000fffe
+/* 0x00000001 has no pt_entry_t equivalent */
#define TLB_BITS \
"\177\020" /* New bitmask */ \
- "b\036WIRED\0" /* bit 30 (1) */ \
- "b\035T\0" /* bit 29 (2) */ \
- "b\034D\0" /* bit 28 (3) */ \
- "b\033B\0" /* bit 27 (4) */ \
- "b\023U\0" /* bit 19 (12) */ \
- "f\024\07AR\0" /* bit 20 (11) .. 26 (5) */ \
- "=\x73" "------\0" \
- "=\x00" "r-----\0" \
- "=\x10" "rw----\0" \
- "=\x20" "r-x---\0" \
- "=\x30" "rwx---\0" \
- "=\x0f" "r--r--\0" \
- "=\x1f" "rw-rw-\0" \
- "=\x2f" "r-xr-x\0" \
- "=\x3f" "rwxrwx\0" \
- "=\x4c" "gate\0" \
- "=\x2c" "break\0" \
- "f\001\017PID\0\0" /* bit 1 (30) .. 15 (16) */
+ "b\036wired\0" /* bit 30 (1) */ \
+ "b\035T\0" /* bit 29 (2) */ \
+ "b\034D\0" /* bit 28 (3) */ \
+ "b\033B\0" /* bit 27 (4) */ \
+ "b\023U\0" /* bit 19 (12) */ \
+ "f\024\07ar\0" /* bit 20 (11) .. 26 (5) */ \
+ "=\x73" "------\0" \
+ "=\x00" "r-----\0" \
+ "=\x10" "rw----\0" \
+ "=\x20" "r-x---\0" \
+ "=\x30" "rwx---\0" \
+ "=\x0f" "r--r--\0" \
+ "=\x1f" "rw-rw-\0" \
+ "=\x2f" "r-xr-x\0" \
+ "=\x3f" "rwxrwx\0" \
+ "=\x4c" "gate\0" \
+ "=\x2c" "break\0" \
+ "f\001\017pid\0\0" /* bit 1 (30) .. 15 (16) */
/* protection for a gateway page */
#define TLB_GATE_PROT 0x04c00000
