Module Name: src
Committed By: jmcneill
Date: Sat Dec 28 19:18:31 UTC 2019
Modified Files:
src/sys/arch/aarch64/aarch64: cpu.c
src/sys/arch/arm/include: cputypes.h
Log Message:
Identify Arm Neoverse E1 and N1 CPUs.
To generate a diff of this commit:
cvs rdiff -u -r1.30 -r1.31 src/sys/arch/aarch64/aarch64/cpu.c
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/include/cputypes.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/cpu.c
diff -u src/sys/arch/aarch64/aarch64/cpu.c:1.30 src/sys/arch/aarch64/aarch64/cpu.c:1.31
--- src/sys/arch/aarch64/aarch64/cpu.c:1.30 Fri Dec 27 21:55:51 2019
+++ src/sys/arch/aarch64/aarch64/cpu.c Sat Dec 28 19:18:31 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.30 2019/12/27 21:55:51 mlelstv Exp $ */
+/* $NetBSD: cpu.c,v 1.31 2019/12/28 19:18:31 jmcneill Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu <[email protected]>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.30 2019/12/27 21:55:51 mlelstv Exp $");
+__KERNEL_RCSID(1, "$NetBSD: cpu.c,v 1.31 2019/12/28 19:18:31 jmcneill Exp $");
#include "locators.h"
#include "opt_arm_debug.h"
@@ -190,6 +190,8 @@ const struct cpuidtab cpuids[] = {
{ CPU_ID_CORTEXA76AER1 & CPU_PARTMASK, "Cortex-A76AE", "Cortex", "V8.2-A+" },
{ CPU_ID_CORTEXA77R0 & CPU_PARTMASK, "Cortex-A77", "Cortex", "V8.2-A+" },
{ CPU_ID_EMAG8180 & CPU_PARTMASK, "Ampere eMAG", "Skylark", "V8-A" },
+ { CPU_ID_NEOVERSEE1R1 & CPU_PARTMASK, "Neoverse E1", "Neoverse", "V8.2-A+" },
+ { CPU_ID_NEOVERSEN1R3 & CPU_PARTMASK, "Neoverse N1", "Neoverse", "V8.2-A+" },
{ CPU_ID_THUNDERXRX, "Cavium ThunderX", "Cavium", "V8-A" },
{ CPU_ID_THUNDERX81XXRX, "Cavium ThunderX CN81XX", "Cavium", "V8-A" },
{ CPU_ID_THUNDERX83XXRX, "Cavium ThunderX CN83XX", "Cavium", "V8-A" },
Index: src/sys/arch/arm/include/cputypes.h
diff -u src/sys/arch/arm/include/cputypes.h:1.10 src/sys/arch/arm/include/cputypes.h:1.11
--- src/sys/arch/arm/include/cputypes.h:1.10 Sun Sep 8 08:10:13 2019
+++ src/sys/arch/arm/include/cputypes.h Sat Dec 28 19:18:31 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: cputypes.h,v 1.10 2019/09/08 08:10:13 tnn Exp $ */
+/* $NetBSD: cputypes.h,v 1.11 2019/12/28 19:18:31 jmcneill Exp $ */
/*
* Copyright (c) 1998, 2001 Ben Harris
@@ -173,6 +173,8 @@
#define CPU_ID_CORTEXA75R2 0x412fd0a0
#define CPU_ID_CORTEXA76AER1 0x411fd0e0
#define CPU_ID_CORTEXA76R3 0x413fd0b0
+#define CPU_ID_NEOVERSEN1R3 0x413fd0c0
+#define CPU_ID_NEOVERSEE1R1 0x411fd4a0
#define CPU_ID_CORTEXA77R0 0x410fd0d0
#define CPU_ID_CORTEX_P(n) ((n & 0xff0fe000) == 0x410fc000)
