Module Name: src
Committed By: msaitoh
Date: Tue Jan 14 09:49:26 UTC 2020
Modified Files:
src/sys/dev/mii: ipgphy.c
src/sys/dev/pci: if_stge.c if_stgereg.h
Log Message:
No functional change:
- Move some definitions from if_stgereg.h to if_stge.c again because those are
not chip (registers or descriptors) definitions.
- Use proplib to pass information that loading DSP code is required when
PHY reset.
To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.9 src/sys/dev/mii/ipgphy.c
cvs rdiff -u -r1.76 -r1.77 src/sys/dev/pci/if_stge.c
cvs rdiff -u -r1.8 -r1.9 src/sys/dev/pci/if_stgereg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/mii/ipgphy.c
diff -u src/sys/dev/mii/ipgphy.c:1.8 src/sys/dev/mii/ipgphy.c:1.9
--- src/sys/dev/mii/ipgphy.c:1.8 Wed Nov 27 10:19:20 2019
+++ src/sys/dev/mii/ipgphy.c Tue Jan 14 09:49:26 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: ipgphy.c,v 1.8 2019/11/27 10:19:20 msaitoh Exp $ */
+/* $NetBSD: ipgphy.c,v 1.9 2020/01/14 09:49:26 msaitoh Exp $ */
/* $OpenBSD: ipgphy.c,v 1.19 2015/07/19 06:28:12 yuo Exp $ */
/*-
@@ -33,7 +33,7 @@
* Driver for the IC Plus IP1000A/IP1001 10/100/1000 PHY.
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ipgphy.c,v 1.8 2019/11/27 10:19:20 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ipgphy.c,v 1.9 2020/01/14 09:49:26 msaitoh Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -41,6 +41,7 @@ __KERNEL_RCSID(0, "$NetBSD: ipgphy.c,v 1
#include <sys/device.h>
#include <sys/socket.h>
#include <sys/errno.h>
+#include <prop/proplib.h>
#include <net/if.h>
#include <net/if_media.h>
@@ -51,12 +52,15 @@ __KERNEL_RCSID(0, "$NetBSD: ipgphy.c,v 1
#include <dev/mii/ipgphyreg.h>
-#include <dev/pci/if_stgereg.h>
-
static int ipgphy_match(device_t, cfdata_t, void *);
static void ipgphy_attach(device_t, device_t, void *);
-CFATTACH_DECL_NEW(ipgphy, sizeof(struct mii_softc),
+struct ipgphy_softc {
+ struct mii_softc sc_mii;
+ bool need_loaddspcode;
+};
+
+CFATTACH_DECL_NEW(ipgphy, sizeof(struct ipgphy_softc),
ipgphy_match, ipgphy_attach, mii_phy_detach, mii_phy_activate);
static int ipgphy_service(struct mii_softc *, struct mii_data *, int);
@@ -89,10 +93,12 @@ ipgphy_match(device_t parent, cfdata_t m
static void
ipgphy_attach(device_t parent, device_t self, void *aux)
{
- struct mii_softc *sc = device_private(self);
+ struct ipgphy_softc *isc = device_private(self);
+ struct mii_softc *sc = &isc->sc_mii;
struct mii_attach_args *ma = aux;
struct mii_data *mii = ma->mii_data;
const struct mii_phydesc *mpd;
+ prop_dictionary_t dict;
mpd = mii_phy_match(ma, ipgphys);
aprint_naive(": Media interface\n");
@@ -107,9 +113,14 @@ ipgphy_attach(device_t parent, device_t
sc->mii_funcs = &ipgphy_funcs;
sc->mii_pdata = mii;
sc->mii_flags = ma->mii_flags;
-
sc->mii_flags |= MIIF_NOISOLATE;
+ if (device_is_a(parent, "stge")) {
+ dict = device_properties(parent);
+ prop_dictionary_get_bool(dict, "need_loaddspcode",
+ &isc->need_loaddspcode);
+ }
+
PHY_RESET(sc);
PHY_READ(sc, MII_BMSR, &sc->mii_capabilities);
@@ -342,6 +353,7 @@ ipgphy_mii_phy_auto(struct mii_softc *sc
static void
ipgphy_load_dspcode(struct mii_softc *sc)
{
+
PHY_WRITE(sc, 31, 0x0001);
PHY_WRITE(sc, 27, 0x01e0);
PHY_WRITE(sc, 31, 0x0002);
@@ -356,7 +368,7 @@ ipgphy_load_dspcode(struct mii_softc *sc
static void
ipgphy_reset(struct mii_softc *sc)
{
- struct ifnet *ifp = sc->mii_pdata->mii_ifp;
+ struct ipgphy_softc *isc = device_private(sc->mii_dev);
uint16_t reg;
mii_phy_reset(sc);
@@ -366,10 +378,6 @@ ipgphy_reset(struct mii_softc *sc)
reg &= ~(BMCR_AUTOEN | BMCR_FDX);
PHY_WRITE(sc, MII_BMCR, reg);
- if (sc->mii_mpd_model == MII_MODEL_xxICPLUS_IP1000A &&
- strcmp(ifp->if_xname, "stge") == 0) {
- struct stge_softc *stge_sc = ifp->if_softc;
- if (stge_sc->sc_rev >= 0x40 && stge_sc->sc_rev <= 0x4e)
- ipgphy_load_dspcode(sc);
- }
+ if (isc->need_loaddspcode)
+ ipgphy_load_dspcode(sc);
}
Index: src/sys/dev/pci/if_stge.c
diff -u src/sys/dev/pci/if_stge.c:1.76 src/sys/dev/pci/if_stge.c:1.77
--- src/sys/dev/pci/if_stge.c:1.76 Thu Jan 9 10:54:16 2020
+++ src/sys/dev/pci/if_stge.c Tue Jan 14 09:49:26 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: if_stge.c,v 1.76 2020/01/09 10:54:16 msaitoh Exp $ */
+/* $NetBSD: if_stge.c,v 1.77 2020/01/14 09:49:26 msaitoh Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -35,7 +35,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_stge.c,v 1.76 2020/01/09 10:54:16 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_stge.c,v 1.77 2020/01/14 09:49:26 msaitoh Exp $");
#include <sys/param.h>
@@ -76,6 +76,167 @@ __KERNEL_RCSID(0, "$NetBSD: if_stge.c,v
#define STGE_VLAN_UNTAG 1
/* #define STGE_VLAN_CFI 1 */
+/*
+ * Transmit descriptor list size.
+ */
+#define STGE_NTXDESC 256
+#define STGE_NTXDESC_MASK (STGE_NTXDESC - 1)
+#define STGE_NEXTTX(x) (((x) + 1) & STGE_NTXDESC_MASK)
+
+/*
+ * Receive descriptor list size.
+ */
+#define STGE_NRXDESC 256
+#define STGE_NRXDESC_MASK (STGE_NRXDESC - 1)
+#define STGE_NEXTRX(x) (((x) + 1) & STGE_NRXDESC_MASK)
+
+/*
+ * Only interrupt every N frames. Must be a power-of-two.
+ */
+#define STGE_TXINTR_SPACING 16
+#define STGE_TXINTR_SPACING_MASK (STGE_TXINTR_SPACING - 1)
+
+/*
+ * Control structures are DMA'd to the TC9021 chip. We allocate them in
+ * a single clump that maps to a single DMA segment to make several things
+ * easier.
+ */
+struct stge_control_data {
+ /*
+ * The transmit descriptors.
+ */
+ struct stge_tfd scd_txdescs[STGE_NTXDESC];
+
+ /*
+ * The receive descriptors.
+ */
+ struct stge_rfd scd_rxdescs[STGE_NRXDESC];
+};
+
+#define STGE_CDOFF(x) offsetof(struct stge_control_data, x)
+#define STGE_CDTXOFF(x) STGE_CDOFF(scd_txdescs[(x)])
+#define STGE_CDRXOFF(x) STGE_CDOFF(scd_rxdescs[(x)])
+
+/*
+ * Software state for transmit and receive jobs.
+ */
+struct stge_descsoft {
+ struct mbuf *ds_mbuf; /* head of our mbuf chain */
+ bus_dmamap_t ds_dmamap; /* our DMA map */
+};
+
+/*
+ * Software state per device.
+ */
+struct stge_softc {
+ device_t sc_dev; /* generic device information */
+ bus_space_tag_t sc_st; /* bus space tag */
+ bus_space_handle_t sc_sh; /* bus space handle */
+ bus_dma_tag_t sc_dmat; /* bus DMA tag */
+ struct ethercom sc_ethercom; /* ethernet common data */
+ int sc_rev; /* silicon revision */
+
+ void *sc_ih; /* interrupt cookie */
+
+ struct mii_data sc_mii; /* MII/media information */
+
+ callout_t sc_tick_ch; /* tick callout */
+
+ bus_dmamap_t sc_cddmamap; /* control data DMA map */
+#define sc_cddma sc_cddmamap->dm_segs[0].ds_addr
+
+ /*
+ * Software state for transmit and receive descriptors.
+ */
+ struct stge_descsoft sc_txsoft[STGE_NTXDESC];
+ struct stge_descsoft sc_rxsoft[STGE_NRXDESC];
+
+ /*
+ * Control data structures.
+ */
+ struct stge_control_data *sc_control_data;
+#define sc_txdescs sc_control_data->scd_txdescs
+#define sc_rxdescs sc_control_data->scd_rxdescs
+
+#ifdef STGE_EVENT_COUNTERS
+ /*
+ * Event counters.
+ */
+ struct evcnt sc_ev_txstall; /* Tx stalled */
+ struct evcnt sc_ev_txdmaintr; /* Tx DMA interrupts */
+ struct evcnt sc_ev_txindintr; /* Tx Indicate interrupts */
+ struct evcnt sc_ev_rxintr; /* Rx interrupts */
+
+ struct evcnt sc_ev_txseg1; /* Tx packets w/ 1 segment */
+ struct evcnt sc_ev_txseg2; /* Tx packets w/ 2 segments */
+ struct evcnt sc_ev_txseg3; /* Tx packets w/ 3 segments */
+ struct evcnt sc_ev_txseg4; /* Tx packets w/ 4 segments */
+ struct evcnt sc_ev_txseg5; /* Tx packets w/ 5 segments */
+ struct evcnt sc_ev_txsegmore; /* Tx packets w/ more than 5 segments */
+ struct evcnt sc_ev_txcopy; /* Tx packets that we had to copy */
+
+ struct evcnt sc_ev_rxipsum; /* IP checksums checked in-bound */
+ struct evcnt sc_ev_rxtcpsum; /* TCP checksums checked in-bound */
+ struct evcnt sc_ev_rxudpsum; /* UDP checksums checked in-bound */
+
+ struct evcnt sc_ev_txipsum; /* IP checksums comp. out-bound */
+ struct evcnt sc_ev_txtcpsum; /* TCP checksums comp. out-bound */
+ struct evcnt sc_ev_txudpsum; /* UDP checksums comp. out-bound */
+#endif /* STGE_EVENT_COUNTERS */
+
+ int sc_txpending; /* number of Tx requests pending */
+ int sc_txdirty; /* first dirty Tx descriptor */
+ int sc_txlast; /* last used Tx descriptor */
+
+ int sc_rxptr; /* next ready Rx descriptor/descsoft */
+ int sc_rxdiscard;
+ int sc_rxlen;
+ struct mbuf *sc_rxhead;
+ struct mbuf *sc_rxtail;
+ struct mbuf **sc_rxtailp;
+
+ int sc_txthresh; /* Tx threshold */
+ uint32_t sc_usefiber:1; /* if we're fiber */
+ uint32_t sc_stge1023:1; /* are we a 1023 */
+ uint32_t sc_DMACtrl; /* prototype DMACtrl register */
+ uint32_t sc_MACCtrl; /* prototype MacCtrl register */
+ uint16_t sc_IntEnable; /* prototype IntEnable register */
+ uint16_t sc_ReceiveMode; /* prototype ReceiveMode register */
+ uint8_t sc_PhyCtrl; /* prototype PhyCtrl register */
+};
+
+#define STGE_RXCHAIN_RESET(sc) \
+do { \
+ (sc)->sc_rxtailp = &(sc)->sc_rxhead; \
+ *(sc)->sc_rxtailp = NULL; \
+ (sc)->sc_rxlen = 0; \
+} while (/*CONSTCOND*/0)
+
+#define STGE_RXCHAIN_LINK(sc, m) \
+do { \
+ *(sc)->sc_rxtailp = (sc)->sc_rxtail = (m); \
+ (sc)->sc_rxtailp = &(m)->m_next; \
+} while (/*CONSTCOND*/0)
+
+/*
+ * Register access macros
+ */
+#define CSR_WRITE_4(_sc, reg, val) \
+ bus_space_write_4((_sc)->sc_st, (_sc)->sc_sh, (reg), (val))
+#define CSR_WRITE_2(_sc, reg, val) \
+ bus_space_write_2((_sc)->sc_st, (_sc)->sc_sh, (reg), (val))
+#define CSR_WRITE_1(_sc, reg, val) \
+ bus_space_write_1((_sc)->sc_st, (_sc)->sc_sh, (reg), (val))
+
+#define CSR_READ_4(_sc, reg) \
+ bus_space_read_4((_sc)->sc_st, (_sc)->sc_sh, (reg))
+#define CSR_READ_2(_sc, reg) \
+ bus_space_read_2((_sc)->sc_st, (_sc)->sc_sh, (reg))
+#define CSR_READ_1(_sc, reg) \
+ bus_space_read_1((_sc)->sc_st, (_sc)->sc_sh, (reg))
+
+#define STGE_TIMEOUT 1000
+
#ifdef STGE_EVENT_COUNTERS
#define STGE_EVCNT_INCR(ev) (ev)->ev_count++
#else
@@ -238,6 +399,7 @@ stge_attach(device_t parent, device_t se
bus_space_tag_t iot, memt;
bus_space_handle_t ioh, memh;
bus_dma_segment_t seg;
+ prop_dictionary_t dict;
prop_data_t data;
int ioh_valid, memh_valid;
int i, rseg, error;
@@ -434,6 +596,11 @@ stge_attach(device_t parent, device_t se
sc->sc_stge1023 = 1;
}
+ /* Set need_loaddspcode before mii_attach() */
+ dict = device_properties(self);
+ prop_dictionary_set_bool(dict, "need_loaddspcode",
+ ((sc->sc_rev >= 0x40) && (sc->sc_rev <= 0x4e)) ? true : false);
+
aprint_normal_dev(self, "Ethernet address %s\n",
ether_sprintf(enaddr));
Index: src/sys/dev/pci/if_stgereg.h
diff -u src/sys/dev/pci/if_stgereg.h:1.8 src/sys/dev/pci/if_stgereg.h:1.9
--- src/sys/dev/pci/if_stgereg.h:1.8 Thu Jan 9 10:54:16 2020
+++ src/sys/dev/pci/if_stgereg.h Tue Jan 14 09:49:26 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: if_stgereg.h,v 1.8 2020/01/09 10:54:16 msaitoh Exp $ */
+/* $NetBSD: if_stgereg.h,v 1.9 2020/01/14 09:49:26 msaitoh Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -45,23 +45,6 @@
*/
/*
- * Register access macros
- */
-#define CSR_WRITE_4(_sc, reg, val) \
- bus_space_write_4((_sc)->sc_st, (_sc)->sc_sh, (reg), (val))
-#define CSR_WRITE_2(_sc, reg, val) \
- bus_space_write_2((_sc)->sc_st, (_sc)->sc_sh, (reg), (val))
-#define CSR_WRITE_1(_sc, reg, val) \
- bus_space_write_1((_sc)->sc_st, (_sc)->sc_sh, (reg), (val))
-
-#define CSR_READ_4(_sc, reg) \
- bus_space_read_4((_sc)->sc_st, (_sc)->sc_sh, (reg))
-#define CSR_READ_2(_sc, reg) \
- bus_space_read_2((_sc)->sc_st, (_sc)->sc_sh, (reg))
-#define CSR_READ_1(_sc, reg) \
- bus_space_read_1((_sc)->sc_st, (_sc)->sc_sh, (reg))
-
-/*
* TC9021 buffer fragment descriptor.
*/
struct stge_frag {
@@ -470,148 +453,4 @@ struct stge_rfd {
#define STGE_EtherStatsPkts1024to1518Octets 0x150
-/*
- * Transmit descriptor list size.
- */
-#define STGE_NTXDESC 256
-#define STGE_NTXDESC_MASK (STGE_NTXDESC - 1)
-#define STGE_NEXTTX(x) (((x) + 1) & STGE_NTXDESC_MASK)
-
-/*
- * Receive descriptor list size.
- */
-#define STGE_NRXDESC 256
-#define STGE_NRXDESC_MASK (STGE_NRXDESC - 1)
-#define STGE_NEXTRX(x) (((x) + 1) & STGE_NRXDESC_MASK)
-
-/*
- * Only interrupt every N frames. Must be a power-of-two.
- */
-#define STGE_TXINTR_SPACING 16
-#define STGE_TXINTR_SPACING_MASK (STGE_TXINTR_SPACING - 1)
-
-/*
- * Control structures are DMA'd to the TC9021 chip. We allocate them in
- * a single clump that maps to a single DMA segment to make several things
- * easier.
- */
-struct stge_control_data {
- /*
- * The transmit descriptors.
- */
- struct stge_tfd scd_txdescs[STGE_NTXDESC];
-
- /*
- * The receive descriptors.
- */
- struct stge_rfd scd_rxdescs[STGE_NRXDESC];
-};
-
-#define STGE_CDOFF(x) offsetof(struct stge_control_data, x)
-#define STGE_CDTXOFF(x) STGE_CDOFF(scd_txdescs[(x)])
-#define STGE_CDRXOFF(x) STGE_CDOFF(scd_rxdescs[(x)])
-
-/*
- * Software state for transmit and receive jobs.
- */
-struct stge_descsoft {
- struct mbuf *ds_mbuf; /* head of our mbuf chain */
- bus_dmamap_t ds_dmamap; /* our DMA map */
-};
-
-/*
- * Software state per device.
- */
-struct stge_softc {
- device_t sc_dev; /* generic device information */
- bus_space_tag_t sc_st; /* bus space tag */
- bus_space_handle_t sc_sh; /* bus space handle */
- bus_dma_tag_t sc_dmat; /* bus DMA tag */
- struct ethercom sc_ethercom; /* ethernet common data */
- int sc_rev; /* silicon revision */
-
- void *sc_ih; /* interrupt cookie */
-
- struct mii_data sc_mii; /* MII/media information */
-
- callout_t sc_tick_ch; /* tick callout */
-
- bus_dmamap_t sc_cddmamap; /* control data DMA map */
-#define sc_cddma sc_cddmamap->dm_segs[0].ds_addr
-
- /*
- * Software state for transmit and receive descriptors.
- */
- struct stge_descsoft sc_txsoft[STGE_NTXDESC];
- struct stge_descsoft sc_rxsoft[STGE_NRXDESC];
-
- /*
- * Control data structures.
- */
- struct stge_control_data *sc_control_data;
-#define sc_txdescs sc_control_data->scd_txdescs
-#define sc_rxdescs sc_control_data->scd_rxdescs
-
-#ifdef STGE_EVENT_COUNTERS
- /*
- * Event counters.
- */
- struct evcnt sc_ev_txstall; /* Tx stalled */
- struct evcnt sc_ev_txdmaintr; /* Tx DMA interrupts */
- struct evcnt sc_ev_txindintr; /* Tx Indicate interrupts */
- struct evcnt sc_ev_rxintr; /* Rx interrupts */
-
- struct evcnt sc_ev_txseg1; /* Tx packets w/ 1 segment */
- struct evcnt sc_ev_txseg2; /* Tx packets w/ 2 segments */
- struct evcnt sc_ev_txseg3; /* Tx packets w/ 3 segments */
- struct evcnt sc_ev_txseg4; /* Tx packets w/ 4 segments */
- struct evcnt sc_ev_txseg5; /* Tx packets w/ 5 segments */
- struct evcnt sc_ev_txsegmore; /* Tx packets w/ more than 5 segments */
- struct evcnt sc_ev_txcopy; /* Tx packets that we had to copy */
-
- struct evcnt sc_ev_rxipsum; /* IP checksums checked in-bound */
- struct evcnt sc_ev_rxtcpsum; /* TCP checksums checked in-bound */
- struct evcnt sc_ev_rxudpsum; /* UDP checksums checked in-bound */
-
- struct evcnt sc_ev_txipsum; /* IP checksums comp. out-bound */
- struct evcnt sc_ev_txtcpsum; /* TCP checksums comp. out-bound */
- struct evcnt sc_ev_txudpsum; /* UDP checksums comp. out-bound */
-#endif /* STGE_EVENT_COUNTERS */
-
- int sc_txpending; /* number of Tx requests pending */
- int sc_txdirty; /* first dirty Tx descriptor */
- int sc_txlast; /* last used Tx descriptor */
-
- int sc_rxptr; /* next ready Rx descriptor/descsoft */
- int sc_rxdiscard;
- int sc_rxlen;
- struct mbuf *sc_rxhead;
- struct mbuf *sc_rxtail;
- struct mbuf **sc_rxtailp;
-
- int sc_txthresh; /* Tx threshold */
- uint32_t sc_usefiber:1; /* if we're fiber */
- uint32_t sc_stge1023:1; /* are we a 1023 */
- uint32_t sc_DMACtrl; /* prototype DMACtrl register */
- uint32_t sc_MACCtrl; /* prototype MacCtrl register */
- uint16_t sc_IntEnable; /* prototype IntEnable register */
- uint16_t sc_ReceiveMode; /* prototype ReceiveMode register */
- uint8_t sc_PhyCtrl; /* prototype PhyCtrl register */
-};
-
-#define STGE_RXCHAIN_RESET(sc) \
-do { \
- (sc)->sc_rxtailp = &(sc)->sc_rxhead; \
- *(sc)->sc_rxtailp = NULL; \
- (sc)->sc_rxlen = 0; \
-} while (/*CONSTCOND*/0)
-
-#define STGE_RXCHAIN_LINK(sc, m) \
-do { \
- *(sc)->sc_rxtailp = (sc)->sc_rxtail = (m); \
- (sc)->sc_rxtailp = &(m)->m_next; \
-} while (/*CONSTCOND*/0)
-
-#define STGE_TIMEOUT 1000
-
#endif /* _DEV_PCI_IF_STGEREG_H_ */
