Module Name: src
Committed By: thorpej
Date: Fri Mar 27 01:42:11 UTC 2020
Modified Files:
src/sys/arch/arm/sunxi: sunxi_rtc.c
Log Message:
Add the clock providers for the sun6i_a31, sun8i_a23, sun8i_r40, sun8i_v3,
sun8i_h3, sun50i_h5 (same as H3), and sun50i_h6 RTC blocks.
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/sunxi/sunxi_rtc.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sunxi/sunxi_rtc.c
diff -u src/sys/arch/arm/sunxi/sunxi_rtc.c:1.5 src/sys/arch/arm/sunxi/sunxi_rtc.c:1.6
--- src/sys/arch/arm/sunxi/sunxi_rtc.c:1.5 Thu Sep 5 23:42:26 2019
+++ src/sys/arch/arm/sunxi/sunxi_rtc.c Fri Mar 27 01:42:10 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_rtc.c,v 1.5 2019/09/05 23:42:26 thorpej Exp $ */
+/* $NetBSD: sunxi_rtc.c,v 1.6 2020/03/27 01:42:10 thorpej Exp $ */
/*-
* Copyright (c) 2014-2017 Jared McNeill <jmcne...@invisible.ca>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sunxi_rtc.c,v 1.5 2019/09/05 23:42:26 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sunxi_rtc.c,v 1.6 2020/03/27 01:42:10 thorpej Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -37,6 +37,7 @@ __KERNEL_RCSID(0, "$NetBSD: sunxi_rtc.c,
#include <sys/mutex.h>
#include <dev/clock_subr.h>
+#include <dev/clk/clk_backend.h>
#include <dev/fdt/fdtvar.h>
@@ -64,6 +65,18 @@ __KERNEL_RCSID(0, "$NetBSD: sunxi_rtc.c,
#define SUN7I_RTC_SECOND __BITS(5,0)
#define SUN7I_RTC_BASE_YEAR 1970
+#define SUN6I_LOSC_CTRL_REG 0x00
+#define SUN6I_LOSC_CTRL_KEY (0x16aa << 16)
+#define SUN6I_LOSC_CTRL_AUTO_SWT_BYPASS __BIT(15)
+#define SUN6I_LOSC_CTRL_ALM_DHMS_ACC __BIT(9)
+#define SUN6I_LOSC_CTRL_RTC_HMS_ACC __BIT(8)
+#define SUN6I_LOSC_CTRL_RTC_YMD_ACC __BIT(7)
+#define SUN6I_LOSC_CTRL_EXT_LOSC_EN __BIT(4)
+#define SUN6I_LOSC_CTRL_EXT_OSC __BIT(0)
+
+#define SUN6I_INTOSC_CLK_PRESCAL_REG 0x08
+#define SUN6I_INTOSC_CLK_PRESCAL __BITS(0,4)
+
#define SUN6I_RTC_YY_MM_DD_REG 0x10
#define SUN6I_RTC_LEAP __BIT(22)
#define SUN6I_RTC_YEAR __BITS(21,16)
@@ -76,14 +89,25 @@ __KERNEL_RCSID(0, "$NetBSD: sunxi_rtc.c,
#define SUN6I_RTC_SECOND __BITS(5,0)
#define SUN6I_RTC_BASE_YEAR 2000
+#define SUN6I_RTC_LOSC_OUT_GATING_REG 0x60
+#define SUN6I_RTC_LOSC_OUT_EN __BIT(0)
+
struct sunxi_rtc_config {
bus_size_t yy_mm_dd_reg;
uint32_t leap, year, month, day;
bus_size_t hh_mm_ss_reg;
uint32_t wk_no, hour, minute, second;
u_int base_year;
+
+ u_int iosc_rate;
+ u_int fixed_prescaler;
+ uint32_t ext_losc_en;
+ uint32_t auto_swt_bypass;
+ u_int flags;
};
+#define SUNXI_RTC_F_HAS_VAR_PRESCALER __BIT(0)
+
static const struct sunxi_rtc_config sun4i_rtc_config = {
.yy_mm_dd_reg = SUN4I_RTC_YY_MM_DD_REG,
.leap = SUN4I_RTC_LEAP,
@@ -98,7 +122,7 @@ static const struct sunxi_rtc_config sun
.base_year = SUN4I_RTC_BASE_YEAR,
};
-static const struct sunxi_rtc_config sun6i_rtc_config = {
+static const struct sunxi_rtc_config sun6i_a31_rtc_config = {
.yy_mm_dd_reg = SUN6I_RTC_YY_MM_DD_REG,
.leap = SUN6I_RTC_LEAP,
.year = SUN6I_RTC_YEAR,
@@ -110,6 +134,9 @@ static const struct sunxi_rtc_config sun
.minute = SUN6I_RTC_MINUTE,
.second = SUN6I_RTC_SECOND,
.base_year = SUN6I_RTC_BASE_YEAR,
+
+ .iosc_rate = 667000,
+ .flags = SUNXI_RTC_F_HAS_VAR_PRESCALER,
};
static const struct sunxi_rtc_config sun7i_rtc_config = {
@@ -126,21 +153,142 @@ static const struct sunxi_rtc_config sun
.base_year = SUN7I_RTC_BASE_YEAR,
};
+static const struct sunxi_rtc_config sun8i_a23_rtc_config = {
+ .yy_mm_dd_reg = SUN6I_RTC_YY_MM_DD_REG,
+ .leap = SUN6I_RTC_LEAP,
+ .year = SUN6I_RTC_YEAR,
+ .month = SUN6I_RTC_MONTH,
+ .day = SUN6I_RTC_DAY,
+ .hh_mm_ss_reg = SUN6I_RTC_HH_MM_SS_REG,
+ .wk_no = SUN6I_RTC_WK_NO,
+ .hour = SUN6I_RTC_HOUR,
+ .minute = SUN6I_RTC_MINUTE,
+ .second = SUN6I_RTC_SECOND,
+ .base_year = SUN6I_RTC_BASE_YEAR,
+
+ .iosc_rate = 667000,
+ .flags = SUNXI_RTC_F_HAS_VAR_PRESCALER,
+};
+
+static const struct sunxi_rtc_config sun8i_r40_rtc_config = {
+ .yy_mm_dd_reg = SUN6I_RTC_YY_MM_DD_REG,
+ .leap = SUN6I_RTC_LEAP,
+ .year = SUN6I_RTC_YEAR,
+ .month = SUN6I_RTC_MONTH,
+ .day = SUN6I_RTC_DAY,
+ .hh_mm_ss_reg = SUN6I_RTC_HH_MM_SS_REG,
+ .wk_no = SUN6I_RTC_WK_NO,
+ .hour = SUN6I_RTC_HOUR,
+ .minute = SUN6I_RTC_MINUTE,
+ .second = SUN6I_RTC_SECOND,
+ .base_year = SUN6I_RTC_BASE_YEAR,
+
+ .iosc_rate = 16000000,
+ .fixed_prescaler = 512,
+};
+
+static const struct sunxi_rtc_config sun8i_v3_rtc_config = {
+ .yy_mm_dd_reg = SUN6I_RTC_YY_MM_DD_REG,
+ .leap = SUN6I_RTC_LEAP,
+ .year = SUN6I_RTC_YEAR,
+ .month = SUN6I_RTC_MONTH,
+ .day = SUN6I_RTC_DAY,
+ .hh_mm_ss_reg = SUN6I_RTC_HH_MM_SS_REG,
+ .wk_no = SUN6I_RTC_WK_NO,
+ .hour = SUN6I_RTC_HOUR,
+ .minute = SUN6I_RTC_MINUTE,
+ .second = SUN6I_RTC_SECOND,
+ .base_year = SUN6I_RTC_BASE_YEAR,
+
+ .iosc_rate = 32000,
+};
+
+static const struct sunxi_rtc_config sun8i_h3_rtc_config = {
+ .yy_mm_dd_reg = SUN6I_RTC_YY_MM_DD_REG,
+ .leap = SUN6I_RTC_LEAP,
+ .year = SUN6I_RTC_YEAR,
+ .month = SUN6I_RTC_MONTH,
+ .day = SUN6I_RTC_DAY,
+ .hh_mm_ss_reg = SUN6I_RTC_HH_MM_SS_REG,
+ .wk_no = SUN6I_RTC_WK_NO,
+ .hour = SUN6I_RTC_HOUR,
+ .minute = SUN6I_RTC_MINUTE,
+ .second = SUN6I_RTC_SECOND,
+ .base_year = SUN6I_RTC_BASE_YEAR,
+
+ .iosc_rate = 16000000,
+ .fixed_prescaler = 32,
+ .flags = SUNXI_RTC_F_HAS_VAR_PRESCALER,
+};
+
+static const struct sunxi_rtc_config sun50i_h6_rtc_config = {
+ .yy_mm_dd_reg = SUN6I_RTC_YY_MM_DD_REG,
+ .leap = SUN6I_RTC_LEAP,
+ .year = SUN6I_RTC_YEAR,
+ .month = SUN6I_RTC_MONTH,
+ .day = SUN6I_RTC_DAY,
+ .hh_mm_ss_reg = SUN6I_RTC_HH_MM_SS_REG,
+ .wk_no = SUN6I_RTC_WK_NO,
+ .hour = SUN6I_RTC_HOUR,
+ .minute = SUN6I_RTC_MINUTE,
+ .second = SUN6I_RTC_SECOND,
+ .base_year = SUN6I_RTC_BASE_YEAR,
+
+ .iosc_rate = 16000000,
+ .fixed_prescaler = 32,
+ .auto_swt_bypass = SUN6I_LOSC_CTRL_AUTO_SWT_BYPASS,
+ .ext_losc_en = SUN6I_LOSC_CTRL_EXT_LOSC_EN,
+ .flags = SUNXI_RTC_F_HAS_VAR_PRESCALER,
+};
+
static const struct of_compat_data compat_data[] = {
{ "allwinner,sun4i-a10-rtc", (uintptr_t)&sun4i_rtc_config },
- { "allwinner,sun6i-a31-rtc", (uintptr_t)&sun6i_rtc_config },
+ { "allwinner,sun6i-a31-rtc", (uintptr_t)&sun6i_a31_rtc_config },
{ "allwinner,sun7i-a20-rtc", (uintptr_t)&sun7i_rtc_config },
- { "allwinner,sun8i-h3-rtc", (uintptr_t)&sun6i_rtc_config },
- { "allwinner,sun50i-h5-rtc", (uintptr_t)&sun6i_rtc_config },
+ { "allwinner,sun8i-a23-rtc", (uintptr_t)&sun8i_a23_rtc_config },
+ { "allwinner,sun8i-r40-rtc", (uintptr_t)&sun8i_r40_rtc_config },
+ { "allwinner,sun8i-v3-rtc", (uintptr_t)&sun8i_v3_rtc_config },
+ { "allwinner,sun8i-h3-rtc", (uintptr_t)&sun8i_h3_rtc_config },
+ { "allwinner,sun50i-h5-rtc", (uintptr_t)&sun8i_h3_rtc_config },
+ { "allwinner,sun50i-h6-rtc", (uintptr_t)&sun50i_h6_rtc_config },
{ NULL }
};
+#define SUNXI_RTC_CLK_LOSC 0
+#define SUNXI_RTC_CLK_LOSC_GATE 1
+#define SUNXI_RTC_CLK_IOSC 2
+#define SUNXI_RTC_NCLKS 3
+
struct sunxi_rtc_softc {
device_t sc_dev;
bus_space_tag_t sc_bst;
bus_space_handle_t sc_bsh;
struct todr_chip_handle sc_todr;
const struct sunxi_rtc_config *sc_conf;
+
+ int sc_phandle;
+
+ struct clk *sc_parent_clk; /* external oscillator */
+
+ /*
+ * We export up to 3 clocks:
+ * [0] The local oscillator output
+ * [1] Gated version of [0]
+ * [2] The internal oscillator
+ *
+ * The local oscillator is driven either by the internal
+ * oscillator (less precise) or an external oscillator.
+ *
+ * Note that these are the order they appear in the device
+ * tree "clock-output-names" property for our node. Not
+ * all flavors of the Allwinner SoCs export all of these
+ * clocks, so we export only those that appear in the
+ * "clock-output-names" property.
+ */
+ const char *sc_clk_names[SUNXI_RTC_NCLKS];
+ struct clk sc_clks[SUNXI_RTC_NCLKS];
+ kmutex_t sc_clk_mutex;
+ struct clk_domain sc_clkdom;
};
#define RTC_READ(sc, reg) \
@@ -154,6 +302,47 @@ static void sunxi_rtc_attach(device_t, d
static int sunxi_rtc_gettime(todr_chip_handle_t, struct clock_ymdhms *);
static int sunxi_rtc_settime(todr_chip_handle_t, struct clock_ymdhms *);
+static struct clk *
+ sunxi_rtc_clk_get(void *, const char *);
+static u_int sunxi_rtc_clk_get_rate(void *, struct clk *);
+static int sunxi_rtc_clk_enable(void *, struct clk *);
+static int sunxi_rtc_clk_disable(void *, struct clk *);
+static int sunxi_rtc_clk_set_parent(void *, struct clk *, struct clk *);
+static struct clk *
+ sunxi_rtc_clk_get_parent(void *, struct clk *);
+
+static const struct clk_funcs sunxi_rtc_clk_funcs = {
+ .get = sunxi_rtc_clk_get,
+ .get_rate = sunxi_rtc_clk_get_rate,
+ .enable = sunxi_rtc_clk_enable,
+ .disable = sunxi_rtc_clk_disable,
+ .set_parent = sunxi_rtc_clk_set_parent,
+ .get_parent = sunxi_rtc_clk_get_parent,
+};
+
+static struct clk *
+sunxi_rtc_clock_decode(device_t dev, int cc_phandle, const void *data,
+ size_t len)
+{
+ struct sunxi_rtc_softc * const sc = device_private(dev);
+
+ if (len != 4)
+ return NULL;
+
+ const u_int clock_id = be32dec(data);
+ if (clock_id >= SUNXI_RTC_NCLKS)
+ return NULL;
+
+ if (sc->sc_clk_names[clock_id] == NULL)
+ return NULL;
+
+ return &sc->sc_clks[clock_id];
+}
+
+static const struct fdtbus_clock_controller_func sunxi_rtc_fdtclock_funcs = {
+ .decode = sunxi_rtc_clock_decode,
+};
+
CFATTACH_DECL_NEW(sunxi_rtc, sizeof(struct sunxi_rtc_softc),
sunxi_rtc_match, sunxi_rtc_attach, NULL, NULL);
@@ -174,6 +363,8 @@ sunxi_rtc_attach(device_t parent, device
bus_addr_t addr;
bus_size_t size;
+ sc->sc_phandle = phandle;
+
if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
aprint_error(": couldn't get registers\n");
return;
@@ -190,11 +381,50 @@ sunxi_rtc_attach(device_t parent, device
aprint_naive("\n");
aprint_normal(": RTC\n");
+ mutex_init(&sc->sc_clk_mutex, MUTEX_DEFAULT, IPL_HIGH);
+
sc->sc_todr.cookie = sc;
sc->sc_todr.todr_gettime_ymdhms = sunxi_rtc_gettime;
sc->sc_todr.todr_settime_ymdhms = sunxi_rtc_settime;
fdtbus_todr_attach(self, phandle, &sc->sc_todr);
+
+ sc->sc_parent_clk = fdtbus_clock_get_index(phandle, 0);
+
+ if (sc->sc_parent_clk == NULL || sc->sc_conf->iosc_rate == 0)
+ return;
+
+ uint32_t reg = SUN6I_LOSC_CTRL_KEY;
+ if (sc->sc_conf->auto_swt_bypass) {
+ /*
+ * Disable auto-switching to the internal oscillator
+ * if the external oscillator disappears.
+ */
+ reg |= sc->sc_conf->auto_swt_bypass;
+ RTC_WRITE(sc, SUN6I_LOSC_CTRL_REG, reg);
+ }
+
+ /* Switch to the external oscillator by default. */
+ reg |= SUN6I_LOSC_CTRL_EXT_OSC | sc->sc_conf->ext_losc_en;
+ RTC_WRITE(sc, SUN6I_LOSC_CTRL_REG, reg);
+
+ sc->sc_clkdom.name = device_xname(sc->sc_dev);
+ sc->sc_clkdom.funcs = &sunxi_rtc_clk_funcs;
+ sc->sc_clkdom.priv = sc;
+
+ unsigned int i;
+ for (i = 0; i < SUNXI_RTC_NCLKS; i++) {
+ sc->sc_clk_names[i] = fdtbus_get_string_index(phandle,
+ "clock-output-names", i);
+ if (sc->sc_clk_names[i] == NULL)
+ break;
+ sc->sc_clks[i].domain = &sc->sc_clkdom;
+ sc->sc_clks[i].name = sc->sc_clk_names[i];
+ clk_attach(&sc->sc_clks[i]);
+ }
+
+ fdtbus_register_clock_controller(sc->sc_dev, sc->sc_phandle,
+ &sunxi_rtc_fdtclock_funcs);
}
static int
@@ -253,3 +483,134 @@ sunxi_rtc_settime(todr_chip_handle_t tch
return 0;
}
+
+static struct clk *
+sunxi_rtc_clk_get(void *priv, const char *name)
+{
+ struct sunxi_rtc_softc * const sc = priv;
+ u_int i;
+
+ for (i = 0; i < SUNXI_RTC_NCLKS; i++) {
+ if (sc->sc_clk_names[i] != NULL &&
+ strcmp(sc->sc_clk_names[i], name) == 0) {
+ return &sc->sc_clks[i];
+ }
+ }
+
+ return NULL;
+}
+
+static u_int
+sunxi_rtc_clk_get_rate(void *priv, struct clk *clk)
+{
+ struct sunxi_rtc_softc * const sc = priv;
+
+ if (clk == &sc->sc_clks[SUNXI_RTC_CLK_IOSC]) {
+ KASSERT(sc->sc_clk_names[SUNXI_RTC_CLK_IOSC] != NULL);
+ KASSERT(sc->sc_conf->iosc_rate != 0);
+ return sc->sc_conf->iosc_rate;
+ }
+
+ KASSERT(sc->sc_parent_clk != NULL);
+ u_int parent_rate = clk_get_rate(sc->sc_parent_clk);
+ uint32_t prescaler = 0;
+
+ if (RTC_READ(sc, SUN6I_LOSC_CTRL_REG) & SUN6I_LOSC_CTRL_EXT_OSC)
+ return parent_rate;
+
+ if (sc->sc_conf->fixed_prescaler)
+ parent_rate /= sc->sc_conf->fixed_prescaler;
+
+ if (sc->sc_conf->flags & SUNXI_RTC_F_HAS_VAR_PRESCALER) {
+ prescaler =
+ __SHIFTOUT(RTC_READ(sc, SUN6I_INTOSC_CLK_PRESCAL_REG),
+ SUN6I_INTOSC_CLK_PRESCAL);
+ }
+
+ return parent_rate / (prescaler + 1);
+}
+
+static int
+sunxi_rtc_clk_enable(void *priv, struct clk *clk)
+{
+ struct sunxi_rtc_softc * const sc = priv;
+
+ if (clk != &sc->sc_clks[SUNXI_RTC_CLK_LOSC_GATE])
+ return 0;
+
+ mutex_enter(&sc->sc_clk_mutex);
+ uint32_t reg = RTC_READ(sc, SUN6I_RTC_LOSC_OUT_GATING_REG);
+ if ((reg & SUN6I_RTC_LOSC_OUT_EN) == 0) {
+ reg |= SUN6I_RTC_LOSC_OUT_EN;
+ RTC_WRITE(sc, SUN6I_RTC_LOSC_OUT_GATING_REG, reg);
+ }
+ mutex_exit(&sc->sc_clk_mutex);
+
+ return 0;
+}
+
+static int
+sunxi_rtc_clk_disable(void *priv, struct clk *clk)
+{
+ struct sunxi_rtc_softc * const sc = priv;
+
+ if (clk != &sc->sc_clks[SUNXI_RTC_CLK_LOSC_GATE])
+ return EINVAL;
+
+ mutex_enter(&sc->sc_clk_mutex);
+ uint32_t reg = RTC_READ(sc, SUN6I_RTC_LOSC_OUT_GATING_REG);
+ if (reg & SUN6I_RTC_LOSC_OUT_EN) {
+ reg &= ~SUN6I_RTC_LOSC_OUT_EN;
+ RTC_WRITE(sc, SUN6I_RTC_LOSC_OUT_GATING_REG, reg);
+ }
+ mutex_exit(&sc->sc_clk_mutex);
+
+ return 0;
+}
+
+static int
+sunxi_rtc_clk_set_parent(void *priv, struct clk *clk, struct clk *parent_clk)
+{
+ struct sunxi_rtc_softc * const sc = priv;
+
+ if (clk == &sc->sc_clks[SUNXI_RTC_CLK_IOSC])
+ return EINVAL;
+
+ if (parent_clk != sc->sc_parent_clk &&
+ parent_clk != &sc->sc_clks[SUNXI_RTC_CLK_IOSC])
+ return EINVAL;
+
+ mutex_enter(&sc->sc_clk_mutex);
+ uint32_t reg = RTC_READ(sc, SUN6I_LOSC_CTRL_REG);
+ if (parent_clk == sc->sc_parent_clk)
+ reg |= SUN6I_LOSC_CTRL_EXT_OSC | sc->sc_conf->ext_losc_en;
+ else
+ reg &= ~(SUN6I_LOSC_CTRL_EXT_OSC | sc->sc_conf->ext_losc_en);
+ RTC_WRITE(sc, SUN6I_LOSC_CTRL_REG, reg | SUN6I_LOSC_CTRL_KEY);
+ mutex_exit(&sc->sc_clk_mutex);
+
+ return 0;
+}
+
+static struct clk *
+sunxi_rtc_clk_get_parent(void *priv, struct clk *clk)
+{
+ struct sunxi_rtc_softc * const sc = priv;
+ uint32_t reg;
+
+ if (clk == &sc->sc_clks[SUNXI_RTC_CLK_IOSC])
+ return NULL;
+
+ reg = RTC_READ(sc, SUN6I_LOSC_CTRL_REG);
+ if (reg & SUN6I_LOSC_CTRL_EXT_OSC)
+ return sc->sc_parent_clk;
+
+ /*
+ * We switch to the external oscillator at attach time becacuse
+ * it's higher quality than the internal one. If we haven't
+ * exported the internal oscillator to the clock tree, then
+ * we shouldn't get here.
+ */
+ KASSERT(sc->sc_clk_names[SUNXI_RTC_CLK_IOSC] != NULL);
+ return &sc->sc_clks[SUNXI_RTC_CLK_IOSC];
+}
