Module Name:    src
Committed By:   msaitoh
Date:           Sun Jan 24 16:26:09 UTC 2010

Modified Files:
        src/sys/dev/mii: brgphy.c

Log Message:
Add support for BCM5461,BCM5784 and BCM5761.
Enable brgphy_jumbo_settings().
Enable the ether...@wirespeed function.


To generate a diff of this commit:
cvs rdiff -u -r1.51 -r1.52 src/sys/dev/mii/brgphy.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/mii/brgphy.c
diff -u src/sys/dev/mii/brgphy.c:1.51 src/sys/dev/mii/brgphy.c:1.52
--- src/sys/dev/mii/brgphy.c:1.51	Wed Nov 18 23:02:12 2009
+++ src/sys/dev/mii/brgphy.c	Sun Jan 24 16:26:09 2010
@@ -1,4 +1,4 @@
-/*	$NetBSD: brgphy.c,v 1.51 2009/11/18 23:02:12 bouyer Exp $	*/
+/*	$NetBSD: brgphy.c,v 1.52 2010/01/24 16:26:09 msaitoh Exp $	*/
 
 /*-
  * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
@@ -62,7 +62,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: brgphy.c,v 1.51 2009/11/18 23:02:12 bouyer Exp $");
+__KERNEL_RCSID(0, "$NetBSD: brgphy.c,v 1.52 2010/01/24 16:26:09 msaitoh Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -113,6 +113,8 @@
 static void	brgphy_5704_a0_bug(struct mii_softc *);
 static void	brgphy_ber_bug(struct mii_softc *);
 static void	brgphy_crc_bug(struct mii_softc *);
+static void	brgphy_jumbo_settings(struct mii_softc *);
+static void	brgphy_eth_wirespeed(struct mii_softc *);
 
 
 static const struct mii_phy_funcs brgphy_funcs = {
@@ -135,12 +137,15 @@
 	{ MII_OUI_BROADCOM,		MII_MODEL_BROADCOM_BCM54K2,
 	  MII_STR_BROADCOM_BCM54K2 },
 
-	{ MII_OUI_BROADCOM,		MII_MODEL_BROADCOM_BCM5464,
-	  MII_STR_BROADCOM_BCM5464 },
+	{ MII_OUI_BROADCOM,		MII_MODEL_BROADCOM_BCM5461,
+	  MII_STR_BROADCOM_BCM5461 },
 
 	{ MII_OUI_BROADCOM,		MII_MODEL_BROADCOM_BCM5462,
 	  MII_STR_BROADCOM_BCM5462 },
 
+	{ MII_OUI_BROADCOM,		MII_MODEL_BROADCOM_BCM5464,
+	  MII_STR_BROADCOM_BCM5464 },
+
 	{ MII_OUI_BROADCOM,		MII_MODEL_BROADCOM_BCM5701,
 	  MII_STR_BROADCOM_BCM5701 },
 
@@ -180,9 +185,15 @@
 	{ MII_OUI_BROADCOM2,		MII_MODEL_BROADCOM2_BCM5755,
 	  MII_STR_BROADCOM2_BCM5755 },
 
+	{ MII_OUI_BROADCOM2,		MII_MODEL_BROADCOM2_BCM5761,
+	  MII_STR_BROADCOM2_BCM5761 },
+
 	{ MII_OUI_BROADCOM2,		MII_MODEL_BROADCOM2_BCM5754,
 	  MII_STR_BROADCOM2_BCM5754 },
 
+	{ MII_OUI_BROADCOM2,		MII_MODEL_BROADCOM2_BCM5784,
+	  MII_STR_BROADCOM2_BCM5784 },
+
 	{ MII_OUI_xxBROADCOM_ALT1,	MII_MODEL_xxBROADCOM_ALT1_BCM5906,
 	  MII_STR_xxBROADCOM_ALT1_BCM5906 },
 
@@ -243,8 +254,9 @@
 	if (device_is_a(parent, "bge")) {
 		bsc->sc_isbge = 1;
 		dict = device_properties(parent);
-		prop_dictionary_get_uint32(dict, "phyflags",
-		    &bsc->sc_bge_flags);
+		if (!prop_dictionary_get_uint32(dict, "phyflags",
+			&bsc->sc_bge_flags))
+			aprint_error("failed to get phyflags");
 	} else if (device_is_a(parent, "bnx")) {
 		bsc->sc_isbnx = 1;
 		dict = device_properties(parent);
@@ -554,21 +566,19 @@
 			if (bsc->sc_bge_flags & BGE_PHY_CRC_BUG)
 				brgphy_crc_bug(sc);
 
-#if 0
 			/* Set Jumbo frame settings in the PHY. */
-			if (bsc->sc_bge_flags & BGE_JUMBO_CAP)
+			if (bsc->sc_bge_flags & BGE_JUMBO_CAPABLE)
 				brgphy_jumbo_settings(sc);
-#endif
 
 			/* Adjust output voltage */
 			if (sc->mii_mpd_model == MII_MODEL_BROADCOM2_BCM5906)
 				PHY_WRITE(sc, BRGPHY_MII_EPHY_PTEST, 0x12);
 
-#if 0
 			/* Enable ether...@wirespeed */
 			if (!(bsc->sc_bge_flags & BGE_NO_ETH_WIRE_SPEED))
 				brgphy_eth_wirespeed(sc);
 
+#if 0
 			/* Enable Link LED on Dell boxes */
 			if (bsc->sc_bge_flags & BGE_NO_3LED) {
 				PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL, 
@@ -807,3 +817,36 @@
 	for (i = 0; dspcode[i].reg != 0; i++)
 		PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
 }
+
+static void
+brgphy_jumbo_settings(struct mii_softc *sc)
+{
+	u_int32_t val;
+
+	/* Set Jumbo frame settings in the PHY. */
+	if (sc->mii_mpd_model == MII_MODEL_BROADCOM_BCM5401) {
+		/* Cannot do read-modify-write on the BCM5401 */
+		PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x4c20);
+	} else {
+		PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7);
+		val = PHY_READ(sc, BRGPHY_MII_AUXCTL);
+		PHY_WRITE(sc, BRGPHY_MII_AUXCTL,
+			val & ~(BRGPHY_AUXCTL_LONG_PKT | 0x7));
+	}
+
+	val = PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL);
+	PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL,
+		val & ~BRGPHY_PHY_EXTCTL_HIGH_LA);
+}
+
+static void
+brgphy_eth_wirespeed(struct mii_softc *sc)
+{
+	u_int32_t val;
+
+	/* Enable ether...@wirespeed */
+	PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7007);
+	val = PHY_READ(sc, BRGPHY_MII_AUXCTL);
+	PHY_WRITE(sc, BRGPHY_MII_AUXCTL,
+		(val | (1 << 15) | (1 << 4)));
+}

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