Module Name: src Committed By: martin Date: Tue Apr 14 17:02:28 UTC 2020
Modified Files: src/sys/dev/ic [netbsd-9]: spdmem.c spdmemvar.h Log Message: Pull up following revision(s) (requested by msaitoh in ticket #832): sys/dev/ic/spdmemvar.h: revision 1.15 sys/dev/ic/spdmemvar.h: revision 1.16 sys/dev/ic/spdmem.c: revision 1.32 sys/dev/ic/spdmem.c: revision 1.33 sys/dev/ic/spdmem.c: revision 1.34 sys/dev/ic/spdmem.c: revision 1.35 Print DDR3's row and column correctly. KNF. No functional change. - Define some new parameters of DDR3 SPD ROM. - Use fine timebase parameters for time calculation on DDR3. This change makes PC3-XXXX value more correctly on newer DDR3. Calculate DDR3's tRAS correctly. Fix unused area size found by pgoyette@. To generate a diff of this commit: cvs rdiff -u -r1.31 -r1.31.4.1 src/sys/dev/ic/spdmem.c cvs rdiff -u -r1.14 -r1.14.4.1 src/sys/dev/ic/spdmemvar.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
Modified files: Index: src/sys/dev/ic/spdmem.c diff -u src/sys/dev/ic/spdmem.c:1.31 src/sys/dev/ic/spdmem.c:1.31.4.1 --- src/sys/dev/ic/spdmem.c:1.31 Sun Apr 7 01:39:12 2019 +++ src/sys/dev/ic/spdmem.c Tue Apr 14 17:02:28 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: spdmem.c,v 1.31 2019/04/07 01:39:12 pgoyette Exp $ */ +/* $NetBSD: spdmem.c,v 1.31.4.1 2020/04/14 17:02:28 martin Exp $ */ /* * Copyright (c) 2007 Nicolas Joly @@ -35,7 +35,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: spdmem.c,v 1.31 2019/04/07 01:39:12 pgoyette Exp $"); +__KERNEL_RCSID(0, "$NetBSD: spdmem.c,v 1.31.4.1 2020/04/14 17:02:28 martin Exp $"); #include <sys/param.h> #include <sys/device.h> @@ -340,12 +340,12 @@ spdmem_common_attach(struct spdmem_softc device_xname(self), NULL, NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL); if (node != NULL && spd_len != 0) - sysctl_createv(&sc->sc_sysctl_log, 0, NULL, NULL, - 0, - CTLTYPE_STRUCT, "spd_data", + sysctl_createv(&sc->sc_sysctl_log, 0, NULL, NULL, + 0, + CTLTYPE_STRUCT, "spd_data", SYSCTL_DESCR("raw spd data"), NULL, - 0, s, spd_len, - CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL); + 0, s, spd_len, + CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL); /* * Decode and print key SPD contents @@ -411,7 +411,7 @@ spdmem_common_attach(struct spdmem_softc strlcat(sc->sc_type, " NVDIMM hybrid", SPDMEM_TYPE_MAXLEN); } - + if (node != NULL) sysctl_createv(&sc->sc_sysctl_log, 0, NULL, NULL, 0, @@ -615,7 +615,7 @@ decode_sdram(const struct sysctlnode *no freq = 0; switch (freq) { /* - * Must check cycle time since some PC-133 DIMMs + * Must check cycle time since some PC-133 DIMMs * actually report PC-100 */ case 100: @@ -756,6 +756,30 @@ print_part(const char *part, size_t pnsi aprint_normal(": %.*s\n", (int)(p - part), part); } +static u_int +ddr3_value_pico(struct spdmem *s, uint8_t txx_mtb, uint8_t txx_ftb) +{ + u_int mtb, ftb; /* in picoseconds */ + intmax_t signed_txx_ftb; + u_int val; + + mtb = (u_int)s->sm_ddr3.ddr3_mtb_dividend * 1000 / + s->sm_ddr3.ddr3_mtb_divisor; + ftb = (u_int)s->sm_ddr3.ddr3_ftb_dividend * 1000 / + s->sm_ddr3.ddr3_ftb_divisor; + + /* tXX_ftb is signed value */ + signed_txx_ftb = (int8_t)txx_ftb; + val = txx_mtb * mtb + + ((txx_ftb > 127) ? signed_txx_ftb : txx_ftb) * ftb / 1000; + + return val; +} + +#define __DDR3_VALUE_PICO(s, field) \ + ddr3_value_pico(s, s->sm_ddr3.ddr3_##field##_mtb, \ + s->sm_ddr3.ddr3_##field##_ftb) + static void decode_ddr3(const struct sysctlnode *node, device_t self, struct spdmem *s) { @@ -786,10 +810,7 @@ decode_ddr3(const struct sysctlnode *nod (s->sm_ddr3.ddr3_chipwidth + 2); dimm_size = (1 << dimm_size) * (s->sm_ddr3.ddr3_physbanks + 1); - cycle_time = (1000 * s->sm_ddr3.ddr3_mtb_dividend + - (s->sm_ddr3.ddr3_mtb_divisor / 2)) / - s->sm_ddr3.ddr3_mtb_divisor; - cycle_time *= s->sm_ddr3.ddr3_tCKmin; + cycle_time = __DDR3_VALUE_PICO(s, tCKmin); bits = 1 << (s->sm_ddr3.ddr3_datawidth + 3); decode_size_speed(self, node, dimm_size, cycle_time, 2, bits, FALSE, "PC3", 0); @@ -797,17 +818,21 @@ decode_ddr3(const struct sysctlnode *nod aprint_verbose_dev(self, "%d rows, %d cols, %d log. banks, %d phys. banks, " "%d.%03dns cycle time\n", - s->sm_ddr3.ddr3_rows + 9, s->sm_ddr3.ddr3_cols + 12, + s->sm_ddr3.ddr3_rows + 12, s->sm_ddr3.ddr3_cols + 9, 1 << (s->sm_ddr3.ddr3_logbanks + 3), s->sm_ddr3.ddr3_physbanks + 1, cycle_time/1000, cycle_time % 1000); -#define __DDR3_CYCLES(field) (s->sm_ddr3.field / s->sm_ddr3.ddr3_tCKmin) +#define __DDR3_CYCLES(val) \ + ((val / cycle_time) + ((val % cycle_time) ? 1 : 0)) - aprint_verbose_dev(self, LATENCY, __DDR3_CYCLES(ddr3_tAAmin), - __DDR3_CYCLES(ddr3_tRCDmin), __DDR3_CYCLES(ddr3_tRPmin), - (s->sm_ddr3.ddr3_tRAS_msb * 256 + s->sm_ddr3.ddr3_tRAS_lsb) / - s->sm_ddr3.ddr3_tCKmin); + aprint_verbose_dev(self, LATENCY, + __DDR3_CYCLES(__DDR3_VALUE_PICO(s, tAAmin)), + __DDR3_CYCLES(__DDR3_VALUE_PICO(s, tRCDmin)), + __DDR3_CYCLES(__DDR3_VALUE_PICO(s, tRPmin)), + __DDR3_CYCLES((s->sm_ddr3.ddr3_tRAS_msb * 256 + + s->sm_ddr3.ddr3_tRAS_lsb) * s->sm_ddr3.ddr3_mtb_dividend + / s->sm_ddr3.ddr3_mtb_divisor * 1000)); #undef __DDR3_CYCLES @@ -857,9 +882,9 @@ decode_fbdimm(const struct sysctlnode *n #define __FBDIMM_CYCLES(field) (s->sm_fbd.field / s->sm_fbd.fbdimm_tCKmin) aprint_verbose_dev(self, LATENCY, __FBDIMM_CYCLES(fbdimm_tAAmin), - __FBDIMM_CYCLES(fbdimm_tRCDmin), __FBDIMM_CYCLES(fbdimm_tRPmin), - (s->sm_fbd.fbdimm_tRAS_msb * 256 + s->sm_fbd.fbdimm_tRAS_lsb) / - s->sm_fbd.fbdimm_tCKmin); + __FBDIMM_CYCLES(fbdimm_tRCDmin), __FBDIMM_CYCLES(fbdimm_tRPmin), + (s->sm_fbd.fbdimm_tRAS_msb * 256 + s->sm_fbd.fbdimm_tRAS_lsb) / + s->sm_fbd.fbdimm_tCKmin); #undef __FBDIMM_CYCLES @@ -870,14 +895,14 @@ static void decode_ddr4(const struct sysctlnode *node, device_t self, struct spdmem *s) { int dimm_size, cycle_time, ranks; - int tAA_clocks, tRCD_clocks,tRP_clocks, tRAS_clocks; + int tAA_clocks, tRCD_clocks, tRP_clocks, tRAS_clocks; aprint_naive("\n"); print_part(s->sm_ddr4.ddr4_part_number, sizeof(s->sm_ddr4.ddr4_part_number)); aprint_normal_dev(self, "%s", spdmem_basic_types[s->sm_type]); if (s->sm_ddr4.ddr4_mod_type < __arraycount(spdmem_ddr4_module_types)) - aprint_normal(" (%s)", + aprint_normal(" (%s)", spdmem_ddr4_module_types[s->sm_ddr4.ddr4_mod_type]); aprint_normal(", %sECC, %stemp-sensor, ", (s->sm_ddr4.ddr4_bus_width_extension) ? "" : "no ", @@ -912,7 +937,7 @@ decode_ddr4(const struct sysctlnode *nod default: dimm_size = -1; /* flag invalid value */ } - if (dimm_size >= 0) { + if (dimm_size >= 0) { dimm_size = (1 << dimm_size) * (s->sm_ddr4.ddr4_package_ranks + 1); /* log.ranks/DIMM */ if (s->sm_ddr4.ddr4_signal_loading == 2) { @@ -928,7 +953,7 @@ decode_ddr4(const struct sysctlnode *nod s->sm_ddr4.ddr4_##field##_ftb) - \ ((s->sm_ddr4.ddr4_##field##_ftb > 127)?256:0)) /* - * For now, the only value for mtb is 0 = 125ps, and ftb = 1ps + * For now, the only value for mtb is 0 = 125ps, and ftb = 1ps * so we don't need to figure out the time-base units - just * hard-code them for now. */ Index: src/sys/dev/ic/spdmemvar.h diff -u src/sys/dev/ic/spdmemvar.h:1.14 src/sys/dev/ic/spdmemvar.h:1.14.4.1 --- src/sys/dev/ic/spdmemvar.h:1.14 Thu Dec 27 02:54:00 2018 +++ src/sys/dev/ic/spdmemvar.h Tue Apr 14 17:02:28 2020 @@ -1,4 +1,4 @@ -/* $NetBSD: spdmemvar.h,v 1.14 2018/12/27 02:54:00 msaitoh Exp $ */ +/* $NetBSD: spdmemvar.h,v 1.14.4.1 2020/04/14 17:02:28 martin Exp $ */ /* * Copyright (c) 2007 Paul Goyette @@ -463,20 +463,20 @@ struct spdmem_ddr3 { /* Dual Data Rat ); uint8_t ddr3_mtb_dividend; /* 0x0108 = 0.1250ns */ uint8_t ddr3_mtb_divisor; /* 0x010f = 0.0625ns */ - uint8_t ddr3_tCKmin; /* in terms of mtb */ + uint8_t ddr3_tCKmin_mtb; uint8_t ddr3_unused3; uint16_t ddr3_CAS_sup; /* Bit 0 ==> CAS 4 cycles */ - uint8_t ddr3_tAAmin; /* in terms of mtb */ + uint8_t ddr3_tAAmin_mtb; uint8_t ddr3_tWRmin; - uint8_t ddr3_tRCDmin; + uint8_t ddr3_tRCDmin_mtb; uint8_t ddr3_tRRDmin; - uint8_t ddr3_tRPmin; + uint8_t ddr3_tRPmin_mtb; SPD_BITFIELD( \ uint8_t ddr3_tRAS_msb:4, \ - uint8_t ddr3_tRC_msb:4, , \ + uint8_t ddr3_tRCmin_mtb_msb:4, , \ ); uint8_t ddr3_tRAS_lsb; - uint8_t ddr3_tRC_lsb; + uint8_t ddr3_tRCmin_mtb_lsb; uint8_t ddr3_tRFCmin_lsb; uint8_t ddr3_tRFCmin_msb; uint8_t ddr3_tWTRmin; @@ -502,7 +502,14 @@ struct spdmem_ddr3 { /* Dual Data Rat uint8_t ddr3_non_std_devtype:7, \ uint8_t ddr3_std_device:1, , \ ); - uint8_t ddr3_unused4[26]; + uint8_t ddr3_tCKmin_ftb; + uint8_t ddr3_tAAmin_ftb; + uint8_t ddr3_tRCDmin_ftb; + uint8_t ddr3_tRPmin_ftb; + uint8_t ddr3_tRCmin_ftb; + uint8_t ddr3_unused4[2]; + uint8_t ddr3_MAC; + uint8_t ddr3_unused4a[18]; uint8_t ddr3_mod_height; uint8_t ddr3_mod_thickness; uint8_t ddr3_ref_card;