Module Name: src
Committed By: maxv
Date: Sat May 9 16:18:57 UTC 2020
Modified Files:
src/sys/dev/nvmm/x86: nvmm_x86.c nvmm_x86_svm.c nvmm_x86_vmx.c
Log Message:
Improve the CPUID emulation of basic leaves:
- Hide DCA and PQM, they cannot be used in guests.
- On Intel, explicitly handle each basic leaf until 0x16.
- On AMD, explicitly handle each basic leaf until 0x0D.
To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.9 src/sys/dev/nvmm/x86/nvmm_x86.c
cvs rdiff -u -r1.59 -r1.60 src/sys/dev/nvmm/x86/nvmm_x86_svm.c
cvs rdiff -u -r1.55 -r1.56 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/nvmm/x86/nvmm_x86.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86.c:1.8 src/sys/dev/nvmm/x86/nvmm_x86.c:1.9
--- src/sys/dev/nvmm/x86/nvmm_x86.c:1.8 Sat Nov 16 17:53:46 2019
+++ src/sys/dev/nvmm/x86/nvmm_x86.c Sat May 9 16:18:57 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: nvmm_x86.c,v 1.8 2019/11/16 17:53:46 maxv Exp $ */
+/* $NetBSD: nvmm_x86.c,v 1.9 2020/05/09 16:18:57 maxv Exp $ */
/*
* Copyright (c) 2018-2019 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86.c,v 1.8 2019/11/16 17:53:46 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86.c,v 1.9 2020/05/09 16:18:57 maxv Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -233,18 +233,18 @@ const struct nvmm_x86_cpuid_mask nvmm_cp
.eax = ~0,
.ebx = ~0,
.ecx =
- /* Excluded: MONITOR, VMX, SMX, EST, TM2, PDCM, PCID, X2APIC,
+ /* Excluded: MONITOR, VMX, SMX, EST, TM2, PDCM, PCID, DCA, X2APIC,
* DEADLINE, RAZ. */
CPUID2_SSE3 | CPUID2_PCLMUL |
CPUID2_DTES64 | CPUID2_DS_CPL |
CPUID2_SSSE3 | CPUID2_CID |
CPUID2_SDBG | CPUID2_FMA |
CPUID2_CX16 | CPUID2_xTPR |
- CPUID2_DCA | CPUID2_SSE41 |
- CPUID2_SSE42 | CPUID2_MOVBE |
- CPUID2_POPCNT | CPUID2_AES |
- CPUID2_XSAVE | CPUID2_OSXSAVE |
- CPUID2_F16C | CPUID2_RDRAND,
+ CPUID2_SSE41 | CPUID2_SSE42 |
+ CPUID2_MOVBE | CPUID2_POPCNT |
+ CPUID2_AES | CPUID2_XSAVE |
+ CPUID2_OSXSAVE | CPUID2_F16C |
+ CPUID2_RDRAND,
.edx =
/* Excluded: MCE, MTRR, MCA, DS, ACPI, TM. */
CPUID_FPU | CPUID_VME |
@@ -265,16 +265,16 @@ const struct nvmm_x86_cpuid_mask nvmm_cp
const struct nvmm_x86_cpuid_mask nvmm_cpuid_00000007 = {
.eax = ~0,
.ebx =
- /* Excluded: TSC_ADJUST, AVX2, INVPCID, AVX512*, PT, SHA. */
+ /* Excluded: TSC_ADJUST, AVX2, INVPCID, QM, AVX512*, PT, SHA. */
CPUID_SEF_FSGSBASE |
CPUID_SEF_SGX | CPUID_SEF_BMI1 |
CPUID_SEF_HLE | CPUID_SEF_FDPEXONLY |
CPUID_SEF_SMEP | CPUID_SEF_BMI2 |
CPUID_SEF_ERMS | CPUID_SEF_RTM |
- CPUID_SEF_QM | CPUID_SEF_FPUCSDS |
- CPUID_SEF_PQE | CPUID_SEF_RDSEED |
- CPUID_SEF_ADX | CPUID_SEF_SMAP |
- CPUID_SEF_CLFLUSHOPT | CPUID_SEF_CLWB,
+ CPUID_SEF_FPUCSDS | CPUID_SEF_PQE |
+ CPUID_SEF_RDSEED | CPUID_SEF_ADX |
+ CPUID_SEF_SMAP | CPUID_SEF_CLFLUSHOPT |
+ CPUID_SEF_CLWB,
.ecx =
/* Excluded: AVX512*, MAWAU, RDPID. */
CPUID_SEF_PREFETCHWT1 | CPUID_SEF_UMIP |
Index: src/sys/dev/nvmm/x86/nvmm_x86_svm.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.59 src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.60
--- src/sys/dev/nvmm/x86/nvmm_x86_svm.c:1.59 Thu Apr 30 16:50:17 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_svm.c Sat May 9 16:18:57 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: nvmm_x86_svm.c,v 1.59 2020/04/30 16:50:17 maxv Exp $ */
+/* $NetBSD: nvmm_x86_svm.c,v 1.60 2020/05/09 16:18:57 maxv Exp $ */
/*
* Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.59 2020/04/30 16:50:17 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.60 2020/05/09 16:18:57 maxv Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -796,20 +796,33 @@ svm_inkernel_handle_cpuid(struct nvmm_cp
cpudata->gprs[NVMM_X64_GPR_RCX] &= ~CPUID2_OSXSAVE;
}
break;
- case 0x00000005:
- case 0x00000006:
+ case 0x00000002: /* Empty */
+ case 0x00000003: /* Empty */
+ case 0x00000004: /* Empty */
+ case 0x00000005: /* Monitor/MWait */
+ case 0x00000006: /* Power Management Related Features */
cpudata->vmcb->state.rax = 0;
cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
break;
- case 0x00000007:
+ case 0x00000007: /* Structured Extended Features */
cpudata->vmcb->state.rax &= nvmm_cpuid_00000007.eax;
cpudata->gprs[NVMM_X64_GPR_RBX] &= nvmm_cpuid_00000007.ebx;
cpudata->gprs[NVMM_X64_GPR_RCX] &= nvmm_cpuid_00000007.ecx;
cpudata->gprs[NVMM_X64_GPR_RDX] &= nvmm_cpuid_00000007.edx;
break;
- case 0x0000000D:
+ case 0x00000008: /* Empty */
+ case 0x00000009: /* Empty */
+ case 0x0000000A: /* Empty */
+ case 0x0000000B: /* Empty */
+ case 0x0000000C: /* Empty */
+ cpudata->vmcb->state.rax = 0;
+ cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
+ cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
+ cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
+ break;
+ case 0x0000000D: /* Processor Extended State Enumeration */
if (svm_xcr0_mask == 0) {
break;
}
@@ -841,7 +854,8 @@ svm_inkernel_handle_cpuid(struct nvmm_cp
break;
}
break;
- case 0x40000000:
+
+ case 0x40000000: /* Hypervisor Information */
cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
@@ -849,6 +863,7 @@ svm_inkernel_handle_cpuid(struct nvmm_cp
memcpy(&cpudata->gprs[NVMM_X64_GPR_RCX], "NVMM", 4);
memcpy(&cpudata->gprs[NVMM_X64_GPR_RDX], " ___", 4);
break;
+
case 0x80000001:
cpudata->vmcb->state.rax &= nvmm_cpuid_80000001.eax;
cpudata->gprs[NVMM_X64_GPR_RBX] &= nvmm_cpuid_80000001.ebx;
Index: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
diff -u src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.55 src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.56
--- src/sys/dev/nvmm/x86/nvmm_x86_vmx.c:1.55 Sat May 9 08:39:07 2020
+++ src/sys/dev/nvmm/x86/nvmm_x86_vmx.c Sat May 9 16:18:57 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: nvmm_x86_vmx.c,v 1.55 2020/05/09 08:39:07 maxv Exp $ */
+/* $NetBSD: nvmm_x86_vmx.c,v 1.56 2020/05/09 16:18:57 maxv Exp $ */
/*
* Copyright (c) 2018-2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.55 2020/05/09 08:39:07 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.56 2020/05/09 16:18:57 maxv Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -1167,14 +1167,24 @@ vmx_inkernel_handle_cpuid(struct nvmm_ma
cpudata->gprs[NVMM_X64_GPR_RCX] &= ~CPUID2_OSXSAVE;
}
break;
- case 0x00000005:
- case 0x00000006:
+ case 0x00000002:
+ break;
+ case 0x00000003:
+ cpudata->gprs[NVMM_X64_GPR_RAX] = 0;
+ cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
+ cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
+ cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
+ break;
+ case 0x00000004: /* Deterministic Cache Parameters */
+ break; /* TODO? */
+ case 0x00000005: /* MONITOR/MWAIT */
+ case 0x00000006: /* Thermal and Power Management */
cpudata->gprs[NVMM_X64_GPR_RAX] = 0;
cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
break;
- case 0x00000007:
+ case 0x00000007: /* Structured Extended Feature Flags Enumeration */
cpudata->gprs[NVMM_X64_GPR_RAX] &= nvmm_cpuid_00000007.eax;
cpudata->gprs[NVMM_X64_GPR_RBX] &= nvmm_cpuid_00000007.ebx;
cpudata->gprs[NVMM_X64_GPR_RCX] &= nvmm_cpuid_00000007.ecx;
@@ -1183,13 +1193,20 @@ vmx_inkernel_handle_cpuid(struct nvmm_ma
cpudata->gprs[NVMM_X64_GPR_RBX] |= CPUID_SEF_INVPCID;
}
break;
- case 0x0000000A:
+ case 0x00000008: /* Empty */
+ case 0x00000009: /* Direct Cache Access Information */
cpudata->gprs[NVMM_X64_GPR_RAX] = 0;
cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
break;
- case 0x0000000B:
+ case 0x0000000A: /* Architectural Performance Monitoring */
+ cpudata->gprs[NVMM_X64_GPR_RAX] = 0;
+ cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
+ cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
+ cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
+ break;
+ case 0x0000000B: /* Extended Topology Enumeration */
switch (ecx) {
case 0: /* Threads */
cpudata->gprs[NVMM_X64_GPR_RAX] = 0;
@@ -1216,7 +1233,13 @@ vmx_inkernel_handle_cpuid(struct nvmm_ma
break;
}
break;
- case 0x0000000D:
+ case 0x0000000C: /* Empty */
+ cpudata->gprs[NVMM_X64_GPR_RAX] = 0;
+ cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
+ cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
+ cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
+ break;
+ case 0x0000000D: /* Processor Extended State Enumeration */
if (vmx_xcr0_mask == 0) {
break;
}
@@ -1248,7 +1271,28 @@ vmx_inkernel_handle_cpuid(struct nvmm_ma
break;
}
break;
- case 0x40000000:
+ case 0x0000000E: /* Empty */
+ case 0x0000000F: /* Intel RDT Monitoring Enumeration */
+ case 0x00000010: /* Intel RDT Allocation Enumeration */
+ cpudata->gprs[NVMM_X64_GPR_RAX] = 0;
+ cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
+ cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
+ cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
+ break;
+ case 0x00000011: /* Empty */
+ case 0x00000012: /* Intel SGX Capability Enumeration */
+ case 0x00000013: /* Empty */
+ case 0x00000014: /* Intel Processor Trace Enumeration */
+ cpudata->gprs[NVMM_X64_GPR_RAX] = 0;
+ cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
+ cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
+ cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
+ break;
+ case 0x00000015: /* TSC and Nominal Core Crystal Clock Information */
+ case 0x00000016: /* Processor Frequency Information */
+ break;
+
+ case 0x40000000: /* Hypervisor Information */
cpudata->gprs[NVMM_X64_GPR_RBX] = 0;
cpudata->gprs[NVMM_X64_GPR_RCX] = 0;
cpudata->gprs[NVMM_X64_GPR_RDX] = 0;
@@ -1256,6 +1300,7 @@ vmx_inkernel_handle_cpuid(struct nvmm_ma
memcpy(&cpudata->gprs[NVMM_X64_GPR_RCX], "NVMM", 4);
memcpy(&cpudata->gprs[NVMM_X64_GPR_RDX], " ___", 4);
break;
+
case 0x80000001:
cpudata->gprs[NVMM_X64_GPR_RAX] &= nvmm_cpuid_80000001.eax;
cpudata->gprs[NVMM_X64_GPR_RBX] &= nvmm_cpuid_80000001.ebx;
