Module Name: src
Committed By: skrll
Date: Thu Jul 9 11:40:54 UTC 2020
Modified Files:
src/sys/arch/arm/arm: armv6_start.S
Log Message:
Remove some newlines
To generate a diff of this commit:
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/arm/arm/armv6_start.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/armv6_start.S
diff -u src/sys/arch/arm/arm/armv6_start.S:1.18 src/sys/arch/arm/arm/armv6_start.S:1.19
--- src/sys/arch/arm/arm/armv6_start.S:1.18 Wed Jul 8 10:17:59 2020
+++ src/sys/arch/arm/arm/armv6_start.S Thu Jul 9 11:40:54 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: armv6_start.S,v 1.18 2020/07/08 10:17:59 skrll Exp $ */
+/* $NetBSD: armv6_start.S,v 1.19 2020/07/09 11:40:54 skrll Exp $ */
/*-
* Copyright (c) 2012, 2017, 2018 The NetBSD Foundation, Inc.
@@ -525,8 +525,6 @@ generic_vstartv6:
#endif
-
-
#if defined(_ARM_ARCH_7)
//
@@ -554,7 +552,6 @@ generic_vstartv6:
#define CPU_CONTROL_XP_ENABLE_SET 0
#endif
-
// bits to set in the Control Register
//
#define CPU_CONTROL_SET ( \
@@ -572,7 +569,6 @@ generic_vstartv6:
CPU_CONTROL_XP_ENABLE_CLR | \
0)
-
/*
* Perform the initialization of the an ARMv7 core required by NetBSD.
*
@@ -646,7 +642,6 @@ armv7_init:
CPU_CONTROL_UNAL_ENABLE | \
0)
-
mrc p15, 0, r0, c1, c0, 0
movw r1, #:lower16:ARMV7_SCTLR_CLEAR
movt r1, #:upper16:ARMV7_SCTLR_CLEAR
@@ -740,7 +735,6 @@ armv7_mmuinit:
mov r1, #DOMAIN_DEFAULT
mcr p15, 0, r1, c3, c0, 0 // DACR write
-
#if 0
/*
@@ -867,7 +861,6 @@ ENTRY_NP(cpu_mpstart)
b armv7_mmuinit
ASEND(cpu_mpstart)
-
/*
* Now running with real kernel VA via bootstrap tables
*/
@@ -1076,7 +1069,6 @@ armv6_mmuinit:
.ltorg
-
/* bits to set in the Control Register */
Lcontrol_set:
#ifdef ARM_MMU_EXTENDED
@@ -1109,7 +1101,6 @@ Lcontrol_wax:
(1 << 10)
#endif
-
ENTRY_NP(generic_vprint)
push {r4, lr}
