Module Name: src
Committed By: ryo
Date: Fri Jul 17 07:16:10 UTC 2020
Modified Files:
src/sys/arch/aarch64/aarch64: locore.S pmapboot.c
src/sys/arch/aarch64/conf: files.aarch64
Log Message:
Add options PMAPBOOT_DEBUG to dump TTBR when pmapboot_enter().
Formerly DEBUG_MMU in locore.S, but there was a bit of confusion.
To generate a diff of this commit:
cvs rdiff -u -r1.67 -r1.68 src/sys/arch/aarch64/aarch64/locore.S
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/aarch64/aarch64/pmapboot.c
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/aarch64/conf/files.aarch64
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/locore.S
diff -u src/sys/arch/aarch64/aarch64/locore.S:1.67 src/sys/arch/aarch64/aarch64/locore.S:1.68
--- src/sys/arch/aarch64/aarch64/locore.S:1.67 Thu Jul 16 11:36:35 2020
+++ src/sys/arch/aarch64/aarch64/locore.S Fri Jul 17 07:16:10 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.67 2020/07/16 11:36:35 skrll Exp $ */
+/* $NetBSD: locore.S,v 1.68 2020/07/17 07:16:10 ryo Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu <[email protected]>
@@ -38,7 +38,7 @@
#include <aarch64/hypervisor.h>
#include "assym.h"
-RCSID("$NetBSD: locore.S,v 1.67 2020/07/16 11:36:35 skrll Exp $")
+RCSID("$NetBSD: locore.S,v 1.68 2020/07/17 07:16:10 ryo Exp $")
#ifdef AARCH64_DEVICE_MEM_STRONGLY_ORDERED
#define MAIR_DEVICE_MEM MAIR_DEVICE_nGnRnE
@@ -49,7 +49,6 @@ RCSID("$NetBSD: locore.S,v 1.67 2020/07/
/*#define DEBUG_LOCORE // debug print */
/*#define DEBUG_LOCORE_PRINT_LOCK // avoid mixing AP's output */
-/*#define DEBUG_MMU // dump MMU table */
#define LOCORE_EL2
@@ -659,7 +658,7 @@ print_x0:
ldp x0, lr, [sp], #16
ret
-#ifdef DEBUG_MMU
+#ifdef VERBOSE_LOCORE
/*
* tinyprintf() supports only maximum 7 '%x', '%d' and '%s' formats.
* width and any modifiers are ignored. '\n' will be replaced to '\r\n'.
@@ -753,7 +752,7 @@ tinyprintf_done:
ldp x19, x20, [sp], #16
ldp x0, lr, [sp], #16
ret
-#endif /* defined(DEBUG_LOCORE) || defined(DEBUG_MMU) */
+#endif /* VERBOSE_LOCORE */
save_ttbrs:
@@ -788,7 +787,7 @@ init_mmutable:
DPRINTSREG("TTBR0 = ", ttbr0_el1)
DPRINTSREG("TTBR1 = ", ttbr1_el1)
-#ifdef DEBUG_MMU
+#ifdef VERBOSE_LOCORE
adr x26, tinyprintf
#else
mov x26, xzr
Index: src/sys/arch/aarch64/aarch64/pmapboot.c
diff -u src/sys/arch/aarch64/aarch64/pmapboot.c:1.8 src/sys/arch/aarch64/aarch64/pmapboot.c:1.9
--- src/sys/arch/aarch64/aarch64/pmapboot.c:1.8 Thu Jul 16 11:36:35 2020
+++ src/sys/arch/aarch64/aarch64/pmapboot.c Fri Jul 17 07:16:10 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: pmapboot.c,v 1.8 2020/07/16 11:36:35 skrll Exp $ */
+/* $NetBSD: pmapboot.c,v 1.9 2020/07/17 07:16:10 ryo Exp $ */
/*
* Copyright (c) 2018 Ryo Shimizu <[email protected]>
@@ -27,12 +27,13 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pmapboot.c,v 1.8 2020/07/16 11:36:35 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmapboot.c,v 1.9 2020/07/17 07:16:10 ryo Exp $");
#include "opt_arm_debug.h"
#include "opt_ddb.h"
#include "opt_multiprocessor.h"
#include "opt_pmap.h"
+#include "opt_pmapboot.h"
#include <sys/param.h>
#include <sys/types.h>
@@ -147,6 +148,13 @@ pmapboot_protect(vaddr_t sva, vaddr_t ev
*/
#ifdef VERBOSE_INIT_ARM
+#define VPRINTF(fmt, args...) \
+ while (pr != NULL) { pr(fmt, ## args); break; }
+#else
+#define VPRINTF(fmt, args...) __nothing
+#endif
+
+#ifdef PMAPBOOT_DEBUG
static void
pmapboot_pte_print(pt_entry_t pte, int level,
void (*pr)(const char *, ...) __printflike(1, 2))
@@ -160,7 +168,15 @@ pmapboot_pte_print(pt_entry_t pte, int l
l0pde_pa(pte));
#endif
}
-#endif /* VERBOSE_INIT_ARM */
+#define PMAPBOOT_DPRINTF(fmt, args...) \
+ while (pr != NULL) { pr(fmt, ## args); break; }
+#define PMAPBOOT_DPRINT_PTE(pte, l) \
+ while (pr != NULL) { pmapboot_pte_print((pte), (l), pr); break; }
+#else /* PMAPBOOT_DEBUG */
+#define PMAPBOOT_DPRINTF(fmt, args...) __nothing
+#define PMAPBOOT_DPRINT_PTE(pte, l) __nothing
+#endif /* PMAPBOOT_DEBUG */
+
#ifdef OPTIMIZE_TLB_CONTIG
static inline bool
@@ -178,17 +194,6 @@ tlb_contiguous_p(vaddr_t addr, vaddr_t s
}
#endif /* OPTIMIZE_TLB_CONTIG */
-
-#ifdef VERBOSE_INIT_ARM
-#define VPRINTF(fmt, args...) \
- while (pr != NULL) { pr(fmt, ## args); break; }
-#define VPRINT_PTE(pte, l) \
- while (pr != NULL) { pmapboot_pte_print((pte), (l), pr); break; }
-#else
-#define VPRINTF(fmt, args...) __nothing
-#define VPRINT_PTE(pte, l) __nothing
-#endif
-
/*
* pmapboot_enter() accesses pagetables by physical address.
* this should be called while identity mapping (VA=PA) available.
@@ -265,8 +270,9 @@ pmapboot_enter(vaddr_t va, paddr_t pa, p
pte = (uint64_t)l1 | L0_TABLE;
l0[idx0] = pte;
- VPRINTF("TTBR%d[%d] (new)\t= %016lx:", ttbr, idx0, pte);
- VPRINT_PTE(pte, 0);
+ PMAPBOOT_DPRINTF("TTBR%d[%d] (new)\t= %016lx:",
+ ttbr, idx0, pte);
+ PMAPBOOT_DPRINT_PTE(pte, 0);
} else {
l1 = (uint64_t *)(l0[idx0] & LX_TBL_PA);
}
@@ -293,9 +299,9 @@ pmapboot_enter(vaddr_t va, paddr_t pa, p
}
l1[idx1] = pte;
- VPRINTF("TTBR%d[%d][%d]\t= %016lx:", ttbr,
+ PMAPBOOT_DPRINTF("TTBR%d[%d][%d]\t= %016lx:", ttbr,
idx0, idx1, pte);
- VPRINT_PTE(pte, 1);
+ PMAPBOOT_DPRINT_PTE(pte, 1);
goto nextblk;
}
@@ -308,9 +314,9 @@ pmapboot_enter(vaddr_t va, paddr_t pa, p
pte = (uint64_t)l2 | L1_TABLE;
l1[idx1] = pte;
- VPRINTF("TTBR%d[%d][%d] (new)\t= %016lx:", ttbr,
- idx0, idx1, pte);
- VPRINT_PTE(pte, 1);
+ PMAPBOOT_DPRINTF("TTBR%d[%d][%d] (new)\t= %016lx:",
+ ttbr, idx0, idx1, pte);
+ PMAPBOOT_DPRINT_PTE(pte, 1);
} else {
l2 = (uint64_t *)(l1[idx1] & LX_TBL_PA);
}
@@ -336,9 +342,9 @@ pmapboot_enter(vaddr_t va, paddr_t pa, p
}
l2[idx2] = pte;
- VPRINTF("TTBR%d[%d][%d][%d]\t= %016lx:", ttbr,
+ PMAPBOOT_DPRINTF("TTBR%d[%d][%d][%d]\t= %016lx:", ttbr,
idx0, idx1, idx2, pte);
- VPRINT_PTE(pte, 2);
+ PMAPBOOT_DPRINT_PTE(pte, 2);
goto nextblk;
}
@@ -351,9 +357,9 @@ pmapboot_enter(vaddr_t va, paddr_t pa, p
pte = (uint64_t)l3 | L2_TABLE;
l2[idx2] = pte;
- VPRINTF("TTBR%d[%d][%d][%d] (new)\t= %016lx:", ttbr,
- idx0, idx1, idx2, pte);
- VPRINT_PTE(pte, 2);
+ PMAPBOOT_DPRINTF("TTBR%d[%d][%d][%d] (new)\t= %016lx:",
+ ttbr, idx0, idx1, idx2, pte);
+ PMAPBOOT_DPRINT_PTE(pte, 2);
} else {
l3 = (uint64_t *)(l2[idx2] & LX_TBL_PA);
}
@@ -379,9 +385,9 @@ pmapboot_enter(vaddr_t va, paddr_t pa, p
}
l3[idx3] = pte;
- VPRINTF("TTBR%d[%d][%d][%d][%d]\t= %lx:", ttbr,
+ PMAPBOOT_DPRINTF("TTBR%d[%d][%d][%d][%d]\t= %lx:", ttbr,
idx0, idx1, idx2, idx3, pte);
- VPRINT_PTE(pte, 3);
+ PMAPBOOT_DPRINT_PTE(pte, 3);
nextblk:
#ifdef OPTIMIZE_TLB_CONTIG
/*
Index: src/sys/arch/aarch64/conf/files.aarch64
diff -u src/sys/arch/aarch64/conf/files.aarch64:1.24 src/sys/arch/aarch64/conf/files.aarch64:1.25
--- src/sys/arch/aarch64/conf/files.aarch64:1.24 Mon Jun 29 23:56:30 2020
+++ src/sys/arch/aarch64/conf/files.aarch64 Fri Jul 17 07:16:10 2020
@@ -1,4 +1,4 @@
-# $NetBSD: files.aarch64,v 1.24 2020/06/29 23:56:30 riastradh Exp $
+# $NetBSD: files.aarch64,v 1.25 2020/07/17 07:16:10 ryo Exp $
defflag opt_cpuoptions.h AARCH64_ALIGNMENT_CHECK
defflag opt_cpuoptions.h AARCH64_EL0_STACK_ALIGNMENT_CHECK
@@ -52,6 +52,7 @@ file arch/arm/arm/efi_runtime.c efi_run
defflag opt_pmap.h PMAPHIST : KERNHIST
defflag opt_pmap.h PMAPCOUNTERS PMAP_STEAL_MEMORY
PMAP_NEED_ALLOC_POOLPAGE
+defflag opt_pmapboot.h PMAPBOOT_DEBUG
# MI support
file dev/cons.c
