Module Name: src
Committed By: msaitoh
Date: Mon Feb 1 05:38:36 UTC 2010
Modified Files:
src/sys/dev/pci: if_bge.c pcireg.h
Log Message:
Fix the bug that unaligned access occurs on amd64. It also fixes the bug
that error bits aren't cleard because these bit are W2C (in other words W1C).
Reported by Michael van Elst.
To generate a diff of this commit:
cvs rdiff -u -r1.178 -r1.179 src/sys/dev/pci/if_bge.c
cvs rdiff -u -r1.62 -r1.63 src/sys/dev/pci/pcireg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/pci/if_bge.c
diff -u src/sys/dev/pci/if_bge.c:1.178 src/sys/dev/pci/if_bge.c:1.179
--- src/sys/dev/pci/if_bge.c:1.178 Thu Jan 28 07:34:12 2010
+++ src/sys/dev/pci/if_bge.c Mon Feb 1 05:38:36 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bge.c,v 1.178 2010/01/28 07:34:12 msaitoh Exp $ */
+/* $NetBSD: if_bge.c,v 1.179 2010/02/01 05:38:36 msaitoh Exp $ */
/*
* Copyright (c) 2001 Wind River Systems
@@ -79,7 +79,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.178 2010/01/28 07:34:12 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.179 2010/02/01 05:38:36 msaitoh Exp $");
#include "vlan.h"
#include "rnd.h"
@@ -3113,10 +3113,11 @@
devctl &= ~(0x0010 | PCI_PCIE_DCSR_ENA_NO_SNOOP);
/* Set PCIE max payload size to 128. */
devctl &= ~(0x00e0);
+ /* Clear device status register. Write 1b to clear */
+ devctl |= PCI_PCIE_DCSR_URD | PCI_PCIE_DCSR_FED
+ | PCI_PCIE_DCSR_NFED | PCI_PCIE_DCSR_CED;
pci_conf_write(sc->sc_pc, sc->sc_pcitag,
sc->bge_expcap + PCI_PCIE_DCSR, devctl);
- pci_conf_write(sc->sc_pc, sc->sc_pcitag,
- sc->bge_expcap + PCI_PCIE_DSR, 0);
}
/* Reset some of the PCI state that got zapped by reset */
Index: src/sys/dev/pci/pcireg.h
diff -u src/sys/dev/pci/pcireg.h:1.62 src/sys/dev/pci/pcireg.h:1.63
--- src/sys/dev/pci/pcireg.h:1.62 Thu Jan 28 02:55:31 2010
+++ src/sys/dev/pci/pcireg.h Mon Feb 1 05:38:36 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: pcireg.h,v 1.62 2010/01/28 02:55:31 msaitoh Exp $ */
+/* $NetBSD: pcireg.h,v 1.63 2010/02/01 05:38:36 msaitoh Exp $ */
/*
* Copyright (c) 1995, 1996, 1999, 2000
@@ -553,7 +553,10 @@
#define PCI_PCIE_DCSR 0x08
#define PCI_PCIE_DCSR_MAX_READ_REQ 0x7000
#define PCI_PCIE_DCSR_ENA_NO_SNOOP 0x00000800
-#define PCI_PCIE_DSR 0x0a
+#define PCI_PCIE_DCSR_CED 0x00010000
+#define PCI_PCIE_DCSR_NFED 0x00020000
+#define PCI_PCIE_DCSR_FED 0x00040000
+#define PCI_PCIE_DCSR_URD 0x00080000
#define PCI_PCIE_LCAP 0x0c
#define PCI_PCIE_LCSR 0x10
#define PCI_PCIE_LCSR_ASPM_L0S 0x00000001
