Module Name: src
Committed By: uwe
Date: Mon Aug 3 16:43:44 UTC 2020
Modified Files:
src/sys/arch/sh3/include: psl.h
src/sys/arch/sh3/sh3: clock.c locore_subr.S mmu_sh4.c
Log Message:
_cpu_exception_suspend - return old SR
In a typical use case we do a very short code sequence with PSL_BL set
and restore the old PSL_BL value with _cpu_exception_resume that does
the full read/mask/set dance. In reality we are just restoring SR to
its old state as no other modifications to SR can possibly happen. So
return old SR and let the caller restore it in one instruction.
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/sh3/include/psl.h
cvs rdiff -u -r1.40 -r1.41 src/sys/arch/sh3/sh3/clock.c
cvs rdiff -u -r1.59 -r1.60 src/sys/arch/sh3/sh3/locore_subr.S
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/sh3/sh3/mmu_sh4.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/sh3/include/psl.h
diff -u src/sys/arch/sh3/include/psl.h:1.11 src/sys/arch/sh3/include/psl.h:1.12
--- src/sys/arch/sh3/include/psl.h:1.11 Wed Jan 26 19:07:42 2011
+++ src/sys/arch/sh3/include/psl.h Mon Aug 3 16:43:44 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: psl.h,v 1.11 2011/01/26 19:07:42 uwe Exp $ */
+/* $NetBSD: psl.h,v 1.12 2020/08/03 16:43:44 uwe Exp $ */
/*-
* Copyright (c) 1990 The Regents of the University of California.
@@ -62,6 +62,12 @@
#ifdef _KERNEL
#ifndef _LOCORE
+static inline __always_inline void
+_cpu_set_sr(uint32_t sr)
+{
+ __asm volatile("ldc %0, sr" :: "r"(sr));
+}
+
/* SR.IMASK */
int _cpu_intr_raise(int);
int _cpu_intr_suspend(void);
Index: src/sys/arch/sh3/sh3/clock.c
diff -u src/sys/arch/sh3/sh3/clock.c:1.40 src/sys/arch/sh3/sh3/clock.c:1.41
--- src/sys/arch/sh3/sh3/clock.c:1.40 Wed Mar 18 10:22:36 2009
+++ src/sys/arch/sh3/sh3/clock.c Mon Aug 3 16:43:44 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: clock.c,v 1.40 2009/03/18 10:22:36 cegger Exp $ */
+/* $NetBSD: clock.c,v 1.41 2020/08/03 16:43:44 uwe Exp $ */
/*-
* Copyright (c) 2002 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.40 2009/03/18 10:22:36 cegger Exp $");
+__KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.41 2020/08/03 16:43:44 uwe Exp $");
#include "opt_pclock.h"
#include "opt_hz.h"
@@ -111,7 +111,7 @@ do { \
void
sh_clock_init(int flags)
{
- uint32_t s, t0, cnt_1s;
+ uint32_t sr, t0, cnt_1s;
sh_clock.flags = flags;
@@ -143,12 +143,12 @@ sh_clock_init(int flags)
_reg_bset_1(SH_(RCR2), SH_RCR2_ENABLE);
}
- s = _cpu_exception_suspend();
+ sr = _cpu_exception_suspend();
_cpu_spin(1); /* load function on cache. */
TMU_START(0);
_cpu_spin(10000000);
t0 = TMU_ELAPSED(0);
- _cpu_exception_resume(s);
+ _cpu_set_sr(sr);
sh_clock.cpucycle_1us = (sh_clock.tmuclk * 10) / t0;
@@ -166,14 +166,14 @@ sh_clock_init(int flags)
/* set TMU channel 1 source to PCLOCK / 4 */
_reg_write_2(SH_(TCR1), TCR_TPSC_P4);
- s = _cpu_exception_suspend();
+ sr = _cpu_exception_suspend();
_cpu_spin(1); /* load function on cache. */
TMU_START(0);
TMU_START(1);
_cpu_spin(cnt_1s); /* 1 sec. */
t0 = TMU_ELAPSED(0);
t1 = TMU_ELAPSED(1);
- _cpu_exception_resume(s);
+ _cpu_set_sr(sr);
sh_clock.pclock
= ((uint64_t)t1 * 4 * SH_RTC_CLOCK + t0/2) / t0;
Index: src/sys/arch/sh3/sh3/locore_subr.S
diff -u src/sys/arch/sh3/sh3/locore_subr.S:1.59 src/sys/arch/sh3/sh3/locore_subr.S:1.60
--- src/sys/arch/sh3/sh3/locore_subr.S:1.59 Mon Aug 3 03:34:11 2020
+++ src/sys/arch/sh3/sh3/locore_subr.S Mon Aug 3 16:43:44 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: locore_subr.S,v 1.59 2020/08/03 03:34:11 uwe Exp $ */
+/* $NetBSD: locore_subr.S,v 1.60 2020/08/03 16:43:44 uwe Exp $ */
/*-
* Copyright (c) 2002 The NetBSD Foundation, Inc.
@@ -40,7 +40,7 @@
#include <sh3/mmu_sh3.h>
#include <sh3/mmu_sh4.h>
-__KERNEL_RCSID(0, "$NetBSD: locore_subr.S,v 1.59 2020/08/03 03:34:11 uwe Exp $")
+__KERNEL_RCSID(0, "$NetBSD: locore_subr.S,v 1.60 2020/08/03 16:43:44 uwe Exp $")
/*
@@ -305,8 +305,8 @@ NENTRY(_cpu_exception_suspend)
swap.w r1, r1 /* r1 = PSL_BL */
or r1, r2 /* r2 |= PSL_BL */
ldc r2, sr /* SR = r2 */
- rts
- and r1, r0 /* r0 &= 0x10000000 */
+ rts /* return old SR */
+ nop
SET_ENTRY_SIZE(_cpu_exception_suspend)
Index: src/sys/arch/sh3/sh3/mmu_sh4.c
diff -u src/sys/arch/sh3/sh3/mmu_sh4.c:1.14 src/sys/arch/sh3/sh3/mmu_sh4.c:1.15
--- src/sys/arch/sh3/sh3/mmu_sh4.c:1.14 Sun Feb 12 16:34:10 2012
+++ src/sys/arch/sh3/sh3/mmu_sh4.c Mon Aug 3 16:43:44 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: mmu_sh4.c,v 1.14 2012/02/12 16:34:10 matt Exp $ */
+/* $NetBSD: mmu_sh4.c,v 1.15 2020/08/03 16:43:44 uwe Exp $ */
/*-
* Copyright (c) 2002 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mmu_sh4.c,v 1.14 2012/02/12 16:34:10 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mmu_sh4.c,v 1.15 2020/08/03 16:43:44 uwe Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -81,10 +81,10 @@ void
sh4_tlb_invalidate_addr(int asid, vaddr_t va)
{
uint32_t pteh;
- int s;
+ int sr;
va &= SH4_PTEH_VPN_MASK;
- s = _cpu_exception_suspend();
+ sr = _cpu_exception_suspend();
/* Save current ASID */
pteh = _reg_read_4(SH4_PTEH);
@@ -98,16 +98,16 @@ sh4_tlb_invalidate_addr(int asid, vaddr_
/* Restore ASID */
_reg_write_4(SH4_PTEH, pteh);
- _cpu_exception_resume(s);
+ _cpu_set_sr(sr);
}
void
sh4_tlb_invalidate_asid(int asid)
{
uint32_t a;
- int e, s;
+ int e, sr;
- s = _cpu_exception_suspend();
+ sr = _cpu_exception_suspend();
/* Invalidate entry attribute to ASID */
RUN_P2;
for (e = 0; e < SH4_UTLB_ENTRY; e++) {
@@ -118,16 +118,16 @@ sh4_tlb_invalidate_asid(int asid)
__sh4_itlb_invalidate_all();
RUN_P1;
- _cpu_exception_resume(s);
+ _cpu_set_sr(sr);
}
void
sh4_tlb_invalidate_all(void)
{
uint32_t a;
- int e, eend, s;
+ int e, eend, sr;
- s = _cpu_exception_suspend();
+ sr = _cpu_exception_suspend();
/* If non-wired entry limit is zero, clear all entry. */
a = _reg_read_4(SH4_MMUCR) & SH4_MMUCR_URB_MASK;
eend = a ? (a >> SH4_MMUCR_URB_SHIFT) : SH4_UTLB_ENTRY;
@@ -145,7 +145,7 @@ sh4_tlb_invalidate_all(void)
_reg_write_4(SH4_ITLB_DA1 | (2 << SH4_ITLB_E_SHIFT), 0);
_reg_write_4(SH4_ITLB_DA1 | (3 << SH4_ITLB_E_SHIFT), 0);
RUN_P1;
- _cpu_exception_resume(s);
+ _cpu_set_sr(sr);
}
void
@@ -153,11 +153,11 @@ sh4_tlb_update(int asid, vaddr_t va, uin
{
uint32_t oasid;
uint32_t ptel;
- int s;
+ int sr;
KDASSERT(asid < 0x100 && (pte & ~PGOFSET) != 0 && va != 0);
- s = _cpu_exception_suspend();
+ sr = _cpu_exception_suspend();
/* Save old ASID */
oasid = _reg_read_4(SH4_PTEH) & SH4_PTEH_ASID_MASK;
@@ -180,5 +180,5 @@ sh4_tlb_update(int asid, vaddr_t va, uin
/* Restore old ASID */
if (asid != oasid)
_reg_write_4(SH4_PTEH, oasid);
- _cpu_exception_resume(s);
+ _cpu_set_sr(sr);
}
