Module Name: src
Committed By: skrll
Date: Thu Aug 27 16:35:13 UTC 2020
Modified Files:
src/sys/arch/arm/sunxi: sunxi_gpio.c
Log Message:
Avoid undefined behaviour as detected by KUBSAN
To generate a diff of this commit:
cvs rdiff -u -r1.27 -r1.28 src/sys/arch/arm/sunxi/sunxi_gpio.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sunxi/sunxi_gpio.c
diff -u src/sys/arch/arm/sunxi/sunxi_gpio.c:1.27 src/sys/arch/arm/sunxi/sunxi_gpio.c:1.28
--- src/sys/arch/arm/sunxi/sunxi_gpio.c:1.27 Tue Oct 1 23:32:52 2019
+++ src/sys/arch/arm/sunxi/sunxi_gpio.c Thu Aug 27 16:35:13 2020
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_gpio.c,v 1.27 2019/10/01 23:32:52 jmcneill Exp $ */
+/* $NetBSD: sunxi_gpio.c,v 1.28 2020/08/27 16:35:13 skrll Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill <[email protected]>
@@ -29,7 +29,7 @@
#include "opt_soc.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sunxi_gpio.c,v 1.27 2019/10/01 23:32:52 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sunxi_gpio.c,v 1.28 2020/08/27 16:35:13 skrll Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -54,17 +54,17 @@ __KERNEL_RCSID(0, "$NetBSD: sunxi_gpio.c
#define SUNXI_GPIO_PORT(port) (0x24 * (port))
#define SUNXI_GPIO_CFG(port, pin) (SUNXI_GPIO_PORT(port) + 0x00 + (0x4 * ((pin) / 8)))
-#define SUNXI_GPIO_CFG_PINMASK(pin) (0x7 << (((pin) % 8) * 4))
+#define SUNXI_GPIO_CFG_PINMASK(pin) (0x7U << (((pin) % 8) * 4))
#define SUNXI_GPIO_DATA(port) (SUNXI_GPIO_PORT(port) + 0x10)
#define SUNXI_GPIO_DRV(port, pin) (SUNXI_GPIO_PORT(port) + 0x14 + (0x4 * ((pin) / 16)))
-#define SUNXI_GPIO_DRV_PINMASK(pin) (0x3 << (((pin) % 16) * 2))
+#define SUNXI_GPIO_DRV_PINMASK(pin) (0x3U << (((pin) % 16) * 2))
#define SUNXI_GPIO_PULL(port, pin) (SUNXI_GPIO_PORT(port) + 0x1c + (0x4 * ((pin) / 16)))
#define SUNXI_GPIO_PULL_DISABLE 0
#define SUNXI_GPIO_PULL_UP 1
#define SUNXI_GPIO_PULL_DOWN 2
-#define SUNXI_GPIO_PULL_PINMASK(pin) (0x3 << (((pin) % 16) * 2))
+#define SUNXI_GPIO_PULL_PINMASK(pin) (0x3U << (((pin) % 16) * 2))
#define SUNXI_GPIO_INT_CFG(bank, eint) (0x200 + (0x20 * (bank)) + (0x4 * ((eint) / 8)))
-#define SUNXI_GPIO_INT_MODEMASK(eint) (0xf << (((eint) % 8) * 4))
+#define SUNXI_GPIO_INT_MODEMASK(eint) (0xfU << (((eint) % 8) * 4))
#define SUNXI_GPIO_INT_MODE_POS_EDGE 0x0
#define SUNXI_GPIO_INT_MODE_NEG_EDGE 0x1
#define SUNXI_GPIO_INT_MODE_HIGH_LEVEL 0x2
