Module Name: src
Committed By: skrll
Date: Wed Jan 27 13:50:17 UTC 2021
Modified Files:
src/sys/arch/arm/arm: armv6_start.S
Log Message:
Trailing whitespace... heh
To generate a diff of this commit:
cvs rdiff -u -r1.33 -r1.34 src/sys/arch/arm/arm/armv6_start.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/armv6_start.S
diff -u src/sys/arch/arm/arm/armv6_start.S:1.33 src/sys/arch/arm/arm/armv6_start.S:1.34
--- src/sys/arch/arm/arm/armv6_start.S:1.33 Tue Dec 1 13:11:55 2020
+++ src/sys/arch/arm/arm/armv6_start.S Wed Jan 27 13:50:17 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: armv6_start.S,v 1.33 2020/12/01 13:11:55 skrll Exp $ */
+/* $NetBSD: armv6_start.S,v 1.34 2021/01/27 13:50:17 skrll Exp $ */
/*-
* Copyright (c) 2012, 2017, 2018 The NetBSD Foundation, Inc.
@@ -578,9 +578,9 @@ generic_vstartv6:
/* SWP is only usable on uni-processor ARMv7 systems. */
#ifdef MULTIPROCESSOR
-#define CPU_CONTROL_XP_SWP_ENABLE 0
+#define CPU_CONTROL_XP_SWP_ENABLE 0
#else
-#define CPU_CONTROL_XP_SWP_ENABLE CPU_CONTROL_SWP_ENABLE
+#define CPU_CONTROL_XP_SWP_ENABLE CPU_CONTROL_SWP_ENABLE
#endif
// bits to set in the Control Register
