Module Name: src Committed By: mlelstv Date: Mon Mar 8 14:22:42 UTC 2021
Modified Files: src/sys/arch/arm/broadcom: bcm2835_intr.c bcm2835reg.h Log Message: Move interrupt register definitions to driver. To generate a diff of this commit: cvs rdiff -u -r1.37 -r1.38 src/sys/arch/arm/broadcom/bcm2835_intr.c cvs rdiff -u -r1.30 -r1.31 src/sys/arch/arm/broadcom/bcm2835reg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
Modified files: Index: src/sys/arch/arm/broadcom/bcm2835_intr.c diff -u src/sys/arch/arm/broadcom/bcm2835_intr.c:1.37 src/sys/arch/arm/broadcom/bcm2835_intr.c:1.38 --- src/sys/arch/arm/broadcom/bcm2835_intr.c:1.37 Wed Jan 27 03:10:19 2021 +++ src/sys/arch/arm/broadcom/bcm2835_intr.c Mon Mar 8 14:22:42 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: bcm2835_intr.c,v 1.37 2021/01/27 03:10:19 thorpej Exp $ */ +/* $NetBSD: bcm2835_intr.c,v 1.38 2021/03/08 14:22:42 mlelstv Exp $ */ /*- * Copyright (c) 2012, 2015, 2019 The NetBSD Foundation, Inc. @@ -30,7 +30,7 @@ */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: bcm2835_intr.c,v 1.37 2021/01/27 03:10:19 thorpej Exp $"); +__KERNEL_RCSID(0, "$NetBSD: bcm2835_intr.c,v 1.38 2021/03/08 14:22:42 mlelstv Exp $"); #define _INTR_PRIVATE @@ -104,6 +104,49 @@ static int bcm2836mp_int_base[BCM2836_NC #define BCM2835_INT_BASE bcm2835_int_base #define BCM2836_INT_BASECPUN(n) bcm2836mp_int_base[(n)] +#define BCM2836_INT_CNTPSIRQ_CPUN(n) (BCM2836_INT_BASECPUN(n) + BCM2836_INT_CNTPSIRQ) +#define BCM2836_INT_CNTPNSIRQ_CPUN(n) (BCM2836_INT_BASECPUN(n) + BCM2836_INT_CNTPNSIRQ) +#define BCM2836_INT_CNTVIRQ_CPUN(n) (BCM2836_INT_BASECPUN(n) + BCM2836_INT_CNTVIRQ) +#define BCM2836_INT_CNTHPIRQ_CPUN(n) (BCM2836_INT_BASECPUN(n) + BCM2836_INT_CNTHPIRQ) +#define BCM2836_INT_MAILBOX0_CPUN(n) (BCM2836_INT_BASECPUN(n) + BCM2836_INT_MAILBOX0) + +/* Periperal Interrupt sources */ +#define BCM2835_NIRQ 96 + +#define BCM2835_INT_GPU0BASE (BCM2835_INT_BASE + 0) +#define BCM2835_INT_TIMER0 (BCM2835_INT_GPU0BASE + 0) +#define BCM2835_INT_TIMER1 (BCM2835_INT_GPU0BASE + 1) +#define BCM2835_INT_TIMER2 (BCM2835_INT_GPU0BASE + 2) +#define BCM2835_INT_TIMER3 (BCM2835_INT_GPU0BASE + 3) +#define BCM2835_INT_USB (BCM2835_INT_GPU0BASE + 9) +#define BCM2835_INT_DMA0 (BCM2835_INT_GPU0BASE + 16) +#define BCM2835_INT_DMA2 (BCM2835_INT_GPU0BASE + 18) +#define BCM2835_INT_DMA3 (BCM2835_INT_GPU0BASE + 19) +#define BCM2835_INT_AUX (BCM2835_INT_GPU0BASE + 29) +#define BCM2835_INT_ARM (BCM2835_INT_GPU0BASE + 30) + +#define BCM2835_INT_GPU1BASE (BCM2835_INT_BASE + 32) +#define BCM2835_INT_GPIO0 (BCM2835_INT_GPU1BASE + 17) +#define BCM2835_INT_GPIO1 (BCM2835_INT_GPU1BASE + 18) +#define BCM2835_INT_GPIO2 (BCM2835_INT_GPU1BASE + 19) +#define BCM2835_INT_GPIO3 (BCM2835_INT_GPU1BASE + 20) +#define BCM2835_INT_BSC (BCM2835_INT_GPU1BASE + 21) +#define BCM2835_INT_SPI0 (BCM2835_INT_GPU1BASE + 22) +#define BCM2835_INT_PCM (BCM2835_INT_GPU1BASE + 23) +#define BCM2835_INT_SDHOST (BCM2835_INT_GPU1BASE + 24) +#define BCM2835_INT_UART0 (BCM2835_INT_GPU1BASE + 25) +#define BCM2835_INT_EMMC (BCM2835_INT_GPU1BASE + 30) + +#define BCM2835_INT_BASICBASE (BCM2835_INT_BASE + 64) +#define BCM2835_INT_ARMTIMER (BCM2835_INT_BASICBASE + 0) +#define BCM2835_INT_ARMMAILBOX (BCM2835_INT_BASICBASE + 1) +#define BCM2835_INT_ARMDOORBELL0 (BCM2835_INT_BASICBASE + 2) +#define BCM2835_INT_ARMDOORBELL1 (BCM2835_INT_BASICBASE + 3) +#define BCM2835_INT_GPU0HALTED (BCM2835_INT_BASICBASE + 4) +#define BCM2835_INT_GPU1HALTED (BCM2835_INT_BASICBASE + 5) +#define BCM2835_INT_ILLEGALTYPE0 (BCM2835_INT_BASICBASE + 6) +#define BCM2835_INT_ILLEGALTYPE1 (BCM2835_INT_BASICBASE + 7) + static void bcm2835_set_priority(struct pic_softc *pic, int ipl) { Index: src/sys/arch/arm/broadcom/bcm2835reg.h diff -u src/sys/arch/arm/broadcom/bcm2835reg.h:1.30 src/sys/arch/arm/broadcom/bcm2835reg.h:1.31 --- src/sys/arch/arm/broadcom/bcm2835reg.h:1.30 Sat Feb 22 00:17:54 2020 +++ src/sys/arch/arm/broadcom/bcm2835reg.h Mon Mar 8 14:22:42 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: bcm2835reg.h,v 1.30 2020/02/22 00:17:54 jmcneill Exp $ */ +/* $NetBSD: bcm2835reg.h,v 1.31 2021/03/08 14:22:42 mlelstv Exp $ */ /*- * Copyright (c) 2012 The NetBSD Foundation, Inc. @@ -165,50 +165,6 @@ #define BCM2836_INT_TIMER 11 #define BCM2836_INT_NLOCAL 12 -#define BCM2836_INT_CNTPSIRQ_CPUN(n) (BCM2836_INT_BASECPUN(n) + BCM2836_INT_CNTPSIRQ) -#define BCM2836_INT_CNTPNSIRQ_CPUN(n) (BCM2836_INT_BASECPUN(n) + BCM2836_INT_CNTPNSIRQ) -#define BCM2836_INT_CNTVIRQ_CPUN(n) (BCM2836_INT_BASECPUN(n) + BCM2836_INT_CNTVIRQ) -#define BCM2836_INT_CNTHPIRQ_CPUN(n) (BCM2836_INT_BASECPUN(n) + BCM2836_INT_CNTHPIRQ) -#define BCM2836_INT_MAILBOX0_CPUN(n) (BCM2836_INT_BASECPUN(n) + BCM2836_INT_MAILBOX0) - -/* Periperal Interrupt sources */ -#define BCM2835_NIRQ 96 - -#define BCM2835_INT_GPU0BASE (BCM2835_INT_BASE + 0) -#define BCM2835_INT_TIMER0 (BCM2835_INT_GPU0BASE + 0) -#define BCM2835_INT_TIMER1 (BCM2835_INT_GPU0BASE + 1) -#define BCM2835_INT_TIMER2 (BCM2835_INT_GPU0BASE + 2) -#define BCM2835_INT_TIMER3 (BCM2835_INT_GPU0BASE + 3) -#define BCM2835_INT_USB (BCM2835_INT_GPU0BASE + 9) -#define BCM2835_INT_DMA0 (BCM2835_INT_GPU0BASE + 16) -#define BCM2835_INT_DMA2 (BCM2835_INT_GPU0BASE + 18) -#define BCM2835_INT_DMA3 (BCM2835_INT_GPU0BASE + 19) -#define BCM2835_INT_AUX (BCM2835_INT_GPU0BASE + 29) -#define BCM2835_INT_ARM (BCM2835_INT_GPU0BASE + 30) - -#define BCM2835_INT_GPU1BASE (BCM2835_INT_BASE + 32) -#define BCM2835_INT_GPIO0 (BCM2835_INT_GPU1BASE + 17) -#define BCM2835_INT_GPIO1 (BCM2835_INT_GPU1BASE + 18) -#define BCM2835_INT_GPIO2 (BCM2835_INT_GPU1BASE + 19) -#define BCM2835_INT_GPIO3 (BCM2835_INT_GPU1BASE + 20) -#define BCM2835_INT_BSC (BCM2835_INT_GPU1BASE + 21) -#define BCM2835_INT_SPI0 (BCM2835_INT_GPU1BASE + 22) -#define BCM2835_INT_PCM (BCM2835_INT_GPU1BASE + 23) -#define BCM2835_INT_SDHOST (BCM2835_INT_GPU1BASE + 24) -#define BCM2835_INT_UART0 (BCM2835_INT_GPU1BASE + 25) -#define BCM2835_INT_EMMC (BCM2835_INT_GPU1BASE + 30) - -#define BCM2835_INT_BASICBASE (BCM2835_INT_BASE + 64) -#define BCM2835_INT_ARMTIMER (BCM2835_INT_BASICBASE + 0) -#define BCM2835_INT_ARMMAILBOX (BCM2835_INT_BASICBASE + 1) -#define BCM2835_INT_ARMDOORBELL0 (BCM2835_INT_BASICBASE + 2) -#define BCM2835_INT_ARMDOORBELL1 (BCM2835_INT_BASICBASE + 3) -#define BCM2835_INT_GPU0HALTED (BCM2835_INT_BASICBASE + 4) -#define BCM2835_INT_GPU1HALTED (BCM2835_INT_BASICBASE + 5) -#define BCM2835_INT_ILLEGALTYPE0 (BCM2835_INT_BASICBASE + 6) -#define BCM2835_INT_ILLEGALTYPE1 (BCM2835_INT_BASICBASE + 7) - - #define BCM2835_UART0_CLK 3000000 #define BCM2711_ARM_LOCAL_BASE_BUS 0x40000000