Module Name: src
Committed By: bsh
Date: Sat Mar 13 11:37:47 UTC 2010
Modified Files:
src/sys/arch/evbarm/conf: TWINTAIL files.g42xxeb
Added Files:
src/sys/arch/evbarm/g42xxeb: g42xxeb_mci.c
Log Message:
add SD/MMC driver for Twintail based on the driver for Zaurus.
To generate a diff of this commit:
cvs rdiff -u -r1.33 -r1.34 src/sys/arch/evbarm/conf/TWINTAIL
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/evbarm/conf/files.g42xxeb
cvs rdiff -u -r0 -r1.1 src/sys/arch/evbarm/g42xxeb/g42xxeb_mci.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/evbarm/conf/TWINTAIL
diff -u src/sys/arch/evbarm/conf/TWINTAIL:1.33 src/sys/arch/evbarm/conf/TWINTAIL:1.34
--- src/sys/arch/evbarm/conf/TWINTAIL:1.33 Sun Mar 7 09:39:42 2010
+++ src/sys/arch/evbarm/conf/TWINTAIL Sat Mar 13 11:37:47 2010
@@ -1,4 +1,4 @@
-# $NetBSD: TWINTAIL,v 1.33 2010/03/07 09:39:42 plunky Exp $
+# $NetBSD: TWINTAIL,v 1.34 2010/03/13 11:37:47 bsh Exp $
#
# TWINTAIL -- Genetec corp. G4255EB-X002 Evaluation Board Kernel
#
@@ -353,6 +353,22 @@
com* at mhzc?
sm* at mhzc?
+# DMAC support
+pxadmac0 at pxaip? addr 0x40000000 intr 25
+options PXA2X0_DMAC_DMOVER_CONCURRENCY=4 # Enable dmover(9) backend
+#options PXA2X0_DMAC_FIXED_PRIORITY # Don't want multiple priority
+
+
+# MMC/SD contoller in PXA255
+# (attached on obio for card detect and write protect signal)
+pxamci0 at obio?
+sdmmc* at pxamci?
+#options PXAMCI_DEBUG
+#options SDMMC_DEBUG
+#options SDMMC_DUMP_CSD
+
+ld* at sdmmc? # MMC/SD card
+
# Pseudo-Devices
# disk/mass storage pseudo-devices
Index: src/sys/arch/evbarm/conf/files.g42xxeb
diff -u src/sys/arch/evbarm/conf/files.g42xxeb:1.5 src/sys/arch/evbarm/conf/files.g42xxeb:1.6
--- src/sys/arch/evbarm/conf/files.g42xxeb:1.5 Mon Mar 17 09:30:02 2008
+++ src/sys/arch/evbarm/conf/files.g42xxeb Sat Mar 13 11:37:47 2010
@@ -1,4 +1,4 @@
-# $NetBSD: files.g42xxeb,v 1.5 2008/03/17 09:30:02 kiyohara Exp $
+# $NetBSD: files.g42xxeb,v 1.6 2010/03/13 11:37:47 bsh Exp $
#
# Genetec corp. G4255EB evaluation board configuration info
#
@@ -8,6 +8,9 @@
# CPU support and integrated peripherals
include "arch/arm/xscale/files.pxa2x0"
+# Machine-independent SD/MMC drivers
+include "dev/sdmmc/files.sdmmc"
+
# G4250EBX on-board devices (including CPLD)
device obio {[addr=-1], [intr=-1]}
attach obio at pxaip
@@ -39,3 +42,6 @@
# Cypress SL811HS USB host controller
attach slhci at opio with slhci_opio
file arch/evbarm/g42xxeb/gb225_slhci.c slhci_opio
+
+attach pxamci at obio with pxamci_obio
+file arch/evbarm/g42xxeb/g42xxeb_mci.c pxamci_obio
Added files:
Index: src/sys/arch/evbarm/g42xxeb/g42xxeb_mci.c
diff -u /dev/null src/sys/arch/evbarm/g42xxeb/g42xxeb_mci.c:1.1
--- /dev/null Sat Mar 13 11:37:47 2010
+++ src/sys/arch/evbarm/g42xxeb/g42xxeb_mci.c Sat Mar 13 11:37:47 2010
@@ -0,0 +1,239 @@
+/* $NetBSD: g42xxeb_mci.c,v 1.1 2010/03/13 11:37:47 bsh Exp $ */
+
+/*-
+ * Copyright (c) 2009 Genetec Corporation. All rights reserved.
+ * Written by Hiroyuki Bessho for Genetec Corporation.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/* derived from zaurus/dev/zmci.c */
+
+/*-
+ * Copyright (c) 2006-2008 NONAKA Kimihiro <[email protected]>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS''
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS
+ * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: g42xxeb_mci.c,v 1.1 2010/03/13 11:37:47 bsh Exp $");
+
+#include <sys/param.h>
+#include <sys/device.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/pmf.h>
+
+#include <machine/intr.h>
+
+#include <arm/xscale/pxa2x0cpu.h>
+#include <arm/xscale/pxa2x0reg.h>
+#include <arm/xscale/pxa2x0var.h>
+#include <arm/xscale/pxa2x0_gpio.h>
+#include <arm/xscale/pxa2x0_mci.h>
+
+#include <dev/sdmmc/sdmmcreg.h>
+
+#include <arm/xscale/pxa2x0var.h>
+#include <evbarm/g42xxeb/g42xxeb_var.h>
+
+struct g42xxeb_mci_softc {
+ struct pxamci_softc sc_mci;
+
+ bus_space_tag_t sc_obio_iot;
+ bus_space_handle_t sc_obio_ioh;
+
+ void *sc_detect_ih;
+};
+
+static int pxamci_match(device_t, cfdata_t, void *);
+static void pxamci_attach(device_t, device_t, void *);
+
+CFATTACH_DECL_NEW(pxamci_obio, sizeof(struct g42xxeb_mci_softc),
+ pxamci_match, pxamci_attach, NULL, NULL);
+
+static int g42xxeb_mci_intr(void *arg);
+
+static uint32_t g42xxeb_mci_get_ocr(void *);
+static int g42xxeb_mci_set_power(void *, uint32_t);
+static int g42xxeb_mci_card_detect(void *);
+static int g42xxeb_mci_write_protect(void *);
+
+static int
+pxamci_match(device_t parent, cfdata_t cf, void *aux)
+{
+
+ if (strcmp(cf->cf_name, "pxamci") == 0)
+ return 1;
+ return 0;
+}
+
+struct pxa2x0_gpioconf g42xxeb_pxamci_gpioconf[] = {
+ { 6, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* MMCCLK */
+ { 8, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* MMCCS0 */
+ { 9, GPIO_CLR | GPIO_ALT_FN_1_OUT }, /* MMCCS1 */
+ { -1 }
+};
+
+
+static void
+pxamci_attach(device_t parent, device_t self, void *aux)
+{
+ struct g42xxeb_mci_softc *sc = device_private(self);
+ struct obio_attach_args *oba = aux;
+ struct obio_softc *osc = device_private(parent);
+ struct pxaip_attach_args pxa;
+ struct pxa2x0_gpioconf *gpioconf[] = {
+ g42xxeb_pxamci_gpioconf,
+ NULL
+ };
+
+ bus_space_tag_t iot = oba->oba_iot;
+
+ sc->sc_mci.sc_dev = self;
+
+ pxa2x0_gpio_config(gpioconf);
+
+ /* Establish card detect interrupt */
+ sc->sc_detect_ih = obio_intr_establish(osc, G42XXEB_INT_MMCSD,
+ IPL_BIO, IST_EDGE_BOTH, g42xxeb_mci_intr, sc);
+ if (sc->sc_detect_ih == NULL) {
+ aprint_error_dev(self,
+ "unable to establish SD detect interrupt\n");
+ return;
+ }
+
+ sc->sc_mci.sc_tag.cookie = sc;
+ sc->sc_mci.sc_tag.get_ocr = g42xxeb_mci_get_ocr;
+ sc->sc_mci.sc_tag.set_power = g42xxeb_mci_set_power;
+ sc->sc_mci.sc_tag.card_detect = g42xxeb_mci_card_detect;
+ sc->sc_mci.sc_tag.write_protect = g42xxeb_mci_write_protect;
+ sc->sc_mci.sc_caps = 0;
+
+ pxa.pxa_iot = iot; /* actually, here we want I/O tag for
+ pxaip, not for obio. */
+
+#if 0
+ /* pxamci_attach_sub() ignores following values and uses
+ * constants. */
+ pxa.pxa_addr = PXA2X0_MMC_BASE;
+ pxa.pxa_size = PXA2X0_MMC_SIZE;
+ pxa.pxa_intr = PXA2X0_INT_MMC;
+#endif
+
+ if (pxamci_attach_sub(self, &pxa)) {
+ aprint_error_dev(self,
+ "unable to attach MMC controller\n");
+ goto free_intr;
+ }
+
+ if (!pmf_device_register(self, NULL, NULL)) {
+ aprint_error_dev(self,
+ "couldn't establish power handler\n");
+ }
+
+ sc->sc_obio_iot = iot;
+ sc->sc_obio_ioh = osc->sc_obioreg_ioh;
+
+ return;
+
+free_intr:
+ obio_intr_disestablish(osc, G42XXEB_INT_MMCSD, sc->sc_detect_ih);
+ sc->sc_detect_ih = NULL;
+}
+
+static int
+g42xxeb_mci_intr(void *arg)
+{
+ struct g42xxeb_mci_softc *sc = (struct g42xxeb_mci_softc *)arg;
+
+ pxamci_card_detect_event(&sc->sc_mci);
+
+ return 1;
+}
+
+static uint32_t
+g42xxeb_mci_get_ocr(void *arg)
+{
+
+ return MMC_OCR_3_2V_3_3V;
+}
+
+static int
+g42xxeb_mci_set_power(void *arg, uint32_t ocr)
+{
+ /* nothing to do */
+ return 0;
+}
+
+/*
+ * Return non-zero if the card is currently inserted.
+ */
+static int
+g42xxeb_mci_card_detect(void *arg)
+{
+ struct g42xxeb_mci_softc *sc = (struct g42xxeb_mci_softc *)arg;
+ uint16_t reg;
+
+ reg = bus_space_read_2(sc->sc_obio_iot, sc->sc_obio_ioh,
+ G42XXEB_INTSTS2);
+
+ return !(reg & (1<<G42XXEB_INT_MMCSD));
+}
+
+/*
+ * Return non-zero if the card is currently write-protected.
+ */
+static int
+g42xxeb_mci_write_protect(void *arg)
+{
+ struct g42xxeb_mci_softc *sc = (struct g42xxeb_mci_softc *)arg;
+ uint16_t reg;
+
+ reg = bus_space_read_2(sc->sc_obio_iot, sc->sc_obio_ioh,
+ G42XXEB_WP);
+
+ return reg & 1;
+}
