Module Name: src
Committed By: rin
Date: Fri Apr 2 03:20:54 UTC 2021
Modified Files:
src/sys/arch/powerpc/include/ibm4xx: dcr4xx.h
Log Message:
Add bit-field definitions for DCR_SDRAM0_B[0-3]CR registers.
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/powerpc/include/ibm4xx/dcr4xx.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/powerpc/include/ibm4xx/dcr4xx.h
diff -u src/sys/arch/powerpc/include/ibm4xx/dcr4xx.h:1.3 src/sys/arch/powerpc/include/ibm4xx/dcr4xx.h:1.4
--- src/sys/arch/powerpc/include/ibm4xx/dcr4xx.h:1.3 Thu Nov 21 13:33:15 2013
+++ src/sys/arch/powerpc/include/ibm4xx/dcr4xx.h Fri Apr 2 03:20:53 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: dcr4xx.h,v 1.3 2013/11/21 13:33:15 kiyohara Exp $ */
+/* $NetBSD: dcr4xx.h,v 1.4 2021/04/02 03:20:53 rin Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -303,6 +303,8 @@
#define DCR_SDRAM0_B1CR 0x44
#define DCR_SDRAM0_B2CR 0x48
#define DCR_SDRAM0_B3CR 0x4c
+#define SDRAM0_BnCR_EN 0x00000001
+#define SDRAM0_BnCR_SZ(n) (1 << ((((n) >> 17) & 7) + 22))
#define DCR_SDRAM0_TR 0x80
#define DCR_SDRAM0_ECCCFG 0x94
#define DCR_SDRAM0_ECCESR 0x98
