Module Name: src
Committed By: martin
Date: Mon Apr 26 18:34:28 UTC 2021
Modified Files:
src/common/lib/libc/arch/arm/atomic [netbsd-9]: atomic_swap.S
atomic_swap_64.S
src/sys/arch/arm/include [netbsd-9]: lock.h
Log Message:
Pull up following revision(s) (requested by skrll in ticket #1254):
sys/arch/arm/include/lock.h: revision 1.37
common/lib/libc/arch/arm/atomic/atomic_swap_64.S: revision 1.11
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.15
common/lib/libc/arch/arm/atomic/atomic_swap.S: revision 1.16
sys/arch/arm/include/lock.h: revision 1.36
Fix ARMv8 instructions
Fix __sync_lock_release_4 to actually zeroise the whole 4bytes/32bits.
Trailing whitespace
Change #ifdef FOO to #if defined(FOO). NFCI.
To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.14.18.1 \
src/common/lib/libc/arch/arm/atomic/atomic_swap.S
cvs rdiff -u -r1.10 -r1.10.18.1 \
src/common/lib/libc/arch/arm/atomic/atomic_swap_64.S
cvs rdiff -u -r1.33 -r1.33.8.1 src/sys/arch/arm/include/lock.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/common/lib/libc/arch/arm/atomic/atomic_swap.S
diff -u src/common/lib/libc/arch/arm/atomic/atomic_swap.S:1.14 src/common/lib/libc/arch/arm/atomic/atomic_swap.S:1.14.18.1
--- src/common/lib/libc/arch/arm/atomic/atomic_swap.S:1.14 Sun May 17 20:57:11 2015
+++ src/common/lib/libc/arch/arm/atomic/atomic_swap.S Mon Apr 26 18:34:28 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: atomic_swap.S,v 1.14 2015/05/17 20:57:11 justin Exp $ */
+/* $NetBSD: atomic_swap.S,v 1.14.18.1 2021/04/26 18:34:28 martin Exp $ */
/*-
* Copyright (c) 2007,2012 The NetBSD Foundation, Inc.
@@ -15,7 +15,7 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
@@ -92,7 +92,7 @@ ENTRY_NP(__sync_lock_release_4)
#else
mcr p15, 0, r1, c7, c10, 5 /* data memory barrier */
#endif
- strb r1, [r0]
+ str r1, [r0]
RET
END(__sync_lock_release_4)
#endif
Index: src/common/lib/libc/arch/arm/atomic/atomic_swap_64.S
diff -u src/common/lib/libc/arch/arm/atomic/atomic_swap_64.S:1.10 src/common/lib/libc/arch/arm/atomic/atomic_swap_64.S:1.10.18.1
--- src/common/lib/libc/arch/arm/atomic/atomic_swap_64.S:1.10 Sun May 17 20:57:11 2015
+++ src/common/lib/libc/arch/arm/atomic/atomic_swap_64.S Mon Apr 26 18:34:28 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: atomic_swap_64.S,v 1.10 2015/05/17 20:57:11 justin Exp $ */
+/* $NetBSD: atomic_swap_64.S,v 1.10.18.1 2021/04/26 18:34:28 martin Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -14,7 +14,7 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
Index: src/sys/arch/arm/include/lock.h
diff -u src/sys/arch/arm/include/lock.h:1.33 src/sys/arch/arm/include/lock.h:1.33.8.1
--- src/sys/arch/arm/include/lock.h:1.33 Sun Sep 17 00:01:07 2017
+++ src/sys/arch/arm/include/lock.h Mon Apr 26 18:34:28 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: lock.h,v 1.33 2017/09/17 00:01:07 christos Exp $ */
+/* $NetBSD: lock.h,v 1.33.8.1 2021/04/26 18:34:28 martin Exp $ */
/*-
* Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
@@ -73,7 +73,7 @@ __cpu_simple_lock_set(__cpu_simple_lock_
#define mb_memory drain_writebuf /* in cpufunc.h */
#endif
-#ifdef _ARM_ARCH_6
+#if defined(_ARM_ARCH_6)
static __inline unsigned int
__arm_load_exclusive(__cpu_simple_lock_t *__alp)
{
@@ -142,7 +142,7 @@ __swp(int __val, __cpu_simple_lock_t *__
static __inline void
__arm_membar_producer(void)
{
-#ifdef _ARM_ARCH_7
+#if defined(_ARM_ARCH_7)
__asm __volatile("dsb" ::: "memory");
#elif defined(_ARM_ARCH_6)
__asm __volatile("mcr\tp15,0,%0,c7,c10,4" :: "r"(0) : "memory");
@@ -152,7 +152,7 @@ __arm_membar_producer(void)
static __inline void
__arm_membar_consumer(void)
{
-#ifdef _ARM_ARCH_7
+#if defined(_ARM_ARCH_7)
__asm __volatile("dmb" ::: "memory");
#elif defined(_ARM_ARCH_6)
__asm __volatile("mcr\tp15,0,%0,c7,c10,5" :: "r"(0) : "memory");
@@ -171,7 +171,7 @@ __cpu_simple_lock_init(__cpu_simple_lock
static __inline void __unused
__cpu_simple_lock(__cpu_simple_lock_t *__alp)
{
-#ifdef _ARM_ARCH_6
+#if defined(_ARM_ARCH_6)
__arm_membar_consumer();
do {
/* spin */
@@ -191,7 +191,7 @@ void __cpu_simple_lock(__cpu_simple_lock
static __inline int __unused
__cpu_simple_lock_try(__cpu_simple_lock_t *__alp)
{
-#ifdef _ARM_ARCH_6
+#if defined(_ARM_ARCH_6)
__arm_membar_consumer();
do {
if (__arm_load_exclusive(__alp) != __SIMPLELOCK_UNLOCKED) {
@@ -212,12 +212,12 @@ static __inline void __unused
__cpu_simple_unlock(__cpu_simple_lock_t *__alp)
{
-#ifdef _ARM_ARCH_8
+#if defined(_ARM_ARCH_8)
if (sizeof(*__alp) == 1) {
- __asm __volatile("stlb\t%0, [%1]"
+ __asm __volatile("stlrb\t%w0, [%1]"
:: "r"(__SIMPLELOCK_UNLOCKED), "r"(__alp) : "memory");
} else {
- __asm __volatile("stl\t%0, [%1]"
+ __asm __volatile("stlr\t%0, [%1]"
:: "r"(__SIMPLELOCK_UNLOCKED), "r"(__alp) : "memory");
}
#else
