Module Name: src
Committed By: skrll
Date: Sat May 1 07:10:34 UTC 2021
Modified Files:
src/sys/arch/riscv/riscv: locore.S
Log Message:
Quick hack to make this link
To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/riscv/riscv/locore.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/riscv/riscv/locore.S
diff -u src/sys/arch/riscv/riscv/locore.S:1.20 src/sys/arch/riscv/riscv/locore.S:1.21
--- src/sys/arch/riscv/riscv/locore.S:1.20 Sun Nov 8 10:08:28 2020
+++ src/sys/arch/riscv/riscv/locore.S Sat May 1 07:10:34 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.20 2020/11/08 10:08:28 skrll Exp $ */
+/* $NetBSD: locore.S,v 1.21 2021/05/01 07:10:34 skrll Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -120,8 +120,7 @@ ENTRY_NP(start)
#endif
// We should have a VM so let's start using our real addresses
- lui t0, %hi(.Lmmu_on) // load hi part of absolute address
- jr t0, %lo(.Lmmu_on) // jump to absolute address
+ PTR_LA t0, .Lmmu_on
.Lmmu_on:
// MMU is on!
