Module Name: src
Committed By: rin
Date: Tue Jun 29 23:26:00 UTC 2021
Modified Files:
src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm: aeabi_cfcmp.S
divmodsi4.S divsi3.S modsi3.S
Log Message:
Align sp to 8-byte boundary as required by EABI.
This is especially important for non-leaf functions; GCC optimizes codes
based on assumption that sp is aligned properly.
Mostly fix broken earmv5 userland compiled by GCC10 due to alignment
faults in ld.elf_so, where {ld,st}rd are used for [sp, #8x].
No regression for ATF is observed for earmv[67]{,hf}{,eb}.
To generate a diff of this commit:
cvs rdiff -u -r1.1.1.1 -r1.2 \
src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/aeabi_cfcmp.S
cvs rdiff -u -r1.1.1.4 -r1.2 \
src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/divmodsi4.S \
src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/divsi3.S \
src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/modsi3.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/aeabi_cfcmp.S
diff -u src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/aeabi_cfcmp.S:1.1.1.1 src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/aeabi_cfcmp.S:1.2
--- src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/aeabi_cfcmp.S:1.1.1.1 Sat Feb 27 18:59:31 2016
+++ src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/aeabi_cfcmp.S Tue Jun 29 23:26:00 2021
@@ -28,8 +28,10 @@
.p2align 2
DEFINE_COMPILERRT_FUNCTION(__aeabi_cfcmpeq)
push {r0-r3, lr}
+ sub sp, #4
bl __aeabi_cfcmpeq_check_nan
cmp r0, #1
+ add sp, #4
pop {r0-r3, lr}
// NaN has been ruled out, so __aeabi_cfcmple can't trap
@@ -56,13 +58,16 @@ DEFINE_COMPILERRT_FUNCTION(__aeabi_cfcmp
// Per the RTABI, this function must preserve r0-r11.
// Save lr in the same instruction for compactness
push {r0-r3, lr}
+ sub sp, #4
bl __aeabi_fcmplt
cmp r0, #1
moveq ip, #0
beq 1f
+ add sp, #4
ldm sp, {r0-r3}
+ sub sp, #4
bl __aeabi_fcmpeq
cmp r0, #1
moveq ip, #(APSR_C | APSR_Z)
@@ -70,6 +75,7 @@ DEFINE_COMPILERRT_FUNCTION(__aeabi_cfcmp
1:
msr CPSR_f, ip
+ add sp, #4
pop {r0-r3}
POP_PC()
END_COMPILERRT_FUNCTION(__aeabi_cfcmple)
Index: src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/divmodsi4.S
diff -u src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/divmodsi4.S:1.1.1.4 src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/divmodsi4.S:1.2
--- src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/divmodsi4.S:1.1.1.4 Sat Feb 27 18:59:31 2016
+++ src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/divmodsi4.S Tue Jun 29 23:26:00 2021
@@ -17,8 +17,10 @@
#define ESTABLISH_FRAME \
push {r4-r7, lr} ;\
- add r7, sp, #12
+ add r7, sp, #12 ;\
+ sub sp, #4
#define CLEAR_FRAME_AND_RETURN \
+ add sp, #4 ;\
pop {r4-r7, pc}
.syntax unified
Index: src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/divsi3.S
diff -u src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/divsi3.S:1.1.1.4 src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/divsi3.S:1.2
--- src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/divsi3.S:1.1.1.4 Sat Feb 27 18:59:31 2016
+++ src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/divsi3.S Tue Jun 29 23:26:00 2021
@@ -16,8 +16,10 @@
#define ESTABLISH_FRAME \
push {r4, r7, lr} ;\
- add r7, sp, #4
+ add r7, sp, #4 ;\
+ sub sp, #4
#define CLEAR_FRAME_AND_RETURN \
+ add sp, #4 ;\
pop {r4, r7, pc}
.syntax unified
Index: src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/modsi3.S
diff -u src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/modsi3.S:1.1.1.4 src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/modsi3.S:1.2
--- src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/modsi3.S:1.1.1.4 Sat Feb 27 18:59:31 2016
+++ src/sys/external/bsd/compiler_rt/dist/lib/builtins/arm/modsi3.S Tue Jun 29 23:26:00 2021
@@ -16,8 +16,10 @@
#define ESTABLISH_FRAME \
push {r4, r7, lr} ;\
- add r7, sp, #4
+ add r7, sp, #4 ;\
+ sub sp, #4
#define CLEAR_FRAME_AND_RETURN \
+ add sp, #4 ;\
pop {r4, r7, pc}
.syntax unified
