Module Name:    xsrc
Committed By:   mrg
Date:           Sun Jul 11 00:41:13 UTC 2021

Modified Files:
        xsrc/external/mit/libdrm/dist/amdgpu: amdgpu_vamgr.c
Added Files:
        xsrc/external/mit/libdrm/include: generated_static_table_fourcc.h

Log Message:
avoid 'visibility' attribute on static functions.


To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 xsrc/external/mit/libdrm/dist/amdgpu/amdgpu_vamgr.c
cvs rdiff -u -r0 -r1.1 \
    xsrc/external/mit/libdrm/include/generated_static_table_fourcc.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: xsrc/external/mit/libdrm/dist/amdgpu/amdgpu_vamgr.c
diff -u xsrc/external/mit/libdrm/dist/amdgpu/amdgpu_vamgr.c:1.3 xsrc/external/mit/libdrm/dist/amdgpu/amdgpu_vamgr.c:1.4
--- xsrc/external/mit/libdrm/dist/amdgpu/amdgpu_vamgr.c:1.3	Sun Jul 11 00:31:54 2021
+++ xsrc/external/mit/libdrm/dist/amdgpu/amdgpu_vamgr.c	Sun Jul 11 00:41:13 2021
@@ -69,7 +69,7 @@ drm_private void amdgpu_vamgr_deinit(str
 	pthread_mutex_destroy(&mgr->bo_va_mutex);
 }
 
-static drm_private int
+static int
 amdgpu_vamgr_subtract_hole(struct amdgpu_bo_va_hole *hole, uint64_t start_va,
 			   uint64_t end_va)
 {
@@ -97,7 +97,7 @@ amdgpu_vamgr_subtract_hole(struct amdgpu
 	return 0;
 }
 
-static drm_private int
+static int
 amdgpu_vamgr_find_va(struct amdgpu_bo_va_mgr *mgr, uint64_t size,
 		     uint64_t alignment, uint64_t base_required,
 		     bool search_from_top, uint64_t *va_out)

Added files:

Index: xsrc/external/mit/libdrm/include/generated_static_table_fourcc.h
diff -u /dev/null xsrc/external/mit/libdrm/include/generated_static_table_fourcc.h:1.1
--- /dev/null	Sun Jul 11 00:41:13 2021
+++ xsrc/external/mit/libdrm/include/generated_static_table_fourcc.h	Sun Jul 11 00:41:13 2021
@@ -0,0 +1,48 @@
+/* AUTOMATICALLY GENERATED by gen_table_fourcc.py. You should modify
+   that script instead of adding here entries manually! */
+static const struct drmFormatModifierInfo drm_format_modifier_table[] = {
+    { DRM_MODIFIER_INVALID(NONE, INVALID_MODIFIER) },
+    { DRM_MODIFIER_LINEAR(NONE, LINEAR) },
+    { DRM_MODIFIER_INTEL(X_TILED, X_TILED) },
+    { DRM_MODIFIER_INTEL(Y_TILED, Y_TILED) },
+    { DRM_MODIFIER_INTEL(Yf_TILED, Yf_TILED) },
+    { DRM_MODIFIER_INTEL(Y_TILED_CCS, Y_TILED_CCS) },
+    { DRM_MODIFIER_INTEL(Yf_TILED_CCS, Yf_TILED_CCS) },
+    { DRM_MODIFIER_INTEL(Y_TILED_GEN12_RC_CCS, Y_TILED_GEN12_RC_CCS) },
+    { DRM_MODIFIER_INTEL(Y_TILED_GEN12_MC_CCS, Y_TILED_GEN12_MC_CCS) },
+    { DRM_MODIFIER(SAMSUNG, 64_32_TILE, 64_32_TILE) },
+    { DRM_MODIFIER(SAMSUNG, 16_16_TILE, 16_16_TILE) },
+    { DRM_MODIFIER(QCOM, COMPRESSED, COMPRESSED) },
+    { DRM_MODIFIER(VIVANTE, TILED, TILED) },
+    { DRM_MODIFIER(VIVANTE, SUPER_TILED, SUPER_TILED) },
+    { DRM_MODIFIER(VIVANTE, SPLIT_TILED, SPLIT_TILED) },
+    { DRM_MODIFIER(VIVANTE, SPLIT_SUPER_TILED, SPLIT_SUPER_TILED) },
+    { DRM_MODIFIER(NVIDIA, TEGRA_TILED, TEGRA_TILED) },
+    { DRM_MODIFIER(NVIDIA, 16BX2_BLOCK_ONE_GOB, 16BX2_BLOCK_ONE_GOB) },
+    { DRM_MODIFIER(NVIDIA, 16BX2_BLOCK_TWO_GOB, 16BX2_BLOCK_TWO_GOB) },
+    { DRM_MODIFIER(NVIDIA, 16BX2_BLOCK_FOUR_GOB, 16BX2_BLOCK_FOUR_GOB) },
+    { DRM_MODIFIER(NVIDIA, 16BX2_BLOCK_EIGHT_GOB, 16BX2_BLOCK_EIGHT_GOB) },
+    { DRM_MODIFIER(NVIDIA, 16BX2_BLOCK_SIXTEEN_GOB, 16BX2_BLOCK_SIXTEEN_GOB) },
+    { DRM_MODIFIER(NVIDIA, 16BX2_BLOCK_THIRTYTWO_GOB, 16BX2_BLOCK_THIRTYTWO_GOB) },
+    { DRM_MODIFIER(BROADCOM, VC4_T_TILED, VC4_T_TILED) },
+    { DRM_MODIFIER(BROADCOM, SAND32, SAND32) },
+    { DRM_MODIFIER(BROADCOM, SAND64, SAND64) },
+    { DRM_MODIFIER(BROADCOM, SAND128, SAND128) },
+    { DRM_MODIFIER(BROADCOM, SAND256, SAND256) },
+    { DRM_MODIFIER(BROADCOM, UIF, UIF) },
+    { DRM_MODIFIER(ARM, 16X16_BLOCK_U_INTERLEAVED, 16X16_BLOCK_U_INTERLEAVED) },
+    { DRM_MODIFIER(ALLWINNER, TILED, TILED) },
+};
+static const struct drmFormatModifierVendorInfo drm_format_modifier_vendor_table[] = {
+    { DRM_FORMAT_MOD_VENDOR_NONE, "NONE" },
+    { DRM_FORMAT_MOD_VENDOR_INTEL, "INTEL" },
+    { DRM_FORMAT_MOD_VENDOR_AMD, "AMD" },
+    { DRM_FORMAT_MOD_VENDOR_NVIDIA, "NVIDIA" },
+    { DRM_FORMAT_MOD_VENDOR_SAMSUNG, "SAMSUNG" },
+    { DRM_FORMAT_MOD_VENDOR_QCOM, "QCOM" },
+    { DRM_FORMAT_MOD_VENDOR_VIVANTE, "VIVANTE" },
+    { DRM_FORMAT_MOD_VENDOR_BROADCOM, "BROADCOM" },
+    { DRM_FORMAT_MOD_VENDOR_ARM, "ARM" },
+    { DRM_FORMAT_MOD_VENDOR_ALLWINNER, "ALLWINNER" },
+    { DRM_FORMAT_MOD_VENDOR_AMLOGIC, "AMLOGIC" },
+};

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