Module Name: src
Committed By: jld
Date: Tue Apr 6 20:43:57 UTC 2010
Modified Files:
src/sys/arch/i386/include: pte.h
Log Message:
Fix typos in PAE comment.
To generate a diff of this commit:
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/i386/include/pte.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/i386/include/pte.h
diff -u src/sys/arch/i386/include/pte.h:1.21 src/sys/arch/i386/include/pte.h:1.22
--- src/sys/arch/i386/include/pte.h:1.21 Fri Feb 26 19:25:07 2010
+++ src/sys/arch/i386/include/pte.h Tue Apr 6 20:43:57 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: pte.h,v 1.21 2010/02/26 19:25:07 jym Exp $ */
+/* $NetBSD: pte.h,v 1.22 2010/04/06 20:43:57 jld Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -164,10 +164,10 @@
*
* The PAE extension extends the size of the PTE to 64 bits (52bits physical
* address) and is compatible with the amd64 PTE format. The first level
- * maps 2M, the second 1G, so a third level page table is intruduced to
+ * maps 2M, the second 1G, so a third level page table is introduced to
* map the 4GB virtual address space. This PD has only 4 entries.
- * We can't use recursive mapping at level 3 to map the PD pages, as
- * this would eat one GB of address space. In addition, Xen impose restrictions
+ * We can't use recursive mapping at level 3 to map the PD pages, as this
+ * would eat one GB of address space. In addition, Xen imposes restrictions
* on the entries we put in the L3 page (for example, the page pointed to by
* the last slot can't be shared among different L3 pages), which makes
* handling this L3 page in the same way we do for L2 on i386 (or L4 on amd64)
