Module Name: src
Committed By: chs
Date: Wed Jul 7 01:23:42 UTC 2010
Modified Files:
src/sys/arch/mips/include: mips_opcode.h
src/sys/arch/mips/mips: mips_emul.c
Log Message:
implement emulation of the "rdhwr" instruction for mips TLS.
To generate a diff of this commit:
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/mips/include/mips_opcode.h
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/mips/mips/mips_emul.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/include/mips_opcode.h
diff -u src/sys/arch/mips/include/mips_opcode.h:1.13 src/sys/arch/mips/include/mips_opcode.h:1.14
--- src/sys/arch/mips/include/mips_opcode.h:1.13 Thu Aug 6 04:34:50 2009
+++ src/sys/arch/mips/include/mips_opcode.h Wed Jul 7 01:23:42 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: mips_opcode.h,v 1.13 2009/08/06 04:34:50 msaitoh Exp $ */
+/* $NetBSD: mips_opcode.h,v 1.14 2010/07/07 01:23:42 chs Exp $ */
/*-
* Copyright (c) 1992, 1993
@@ -147,6 +147,7 @@
#define OP_LDR 033 /* MIPS-II, for r4000 port */
#define OP_SPECIAL2 034 /* QED opcodes */
+#define OP_SPECIAL3 037
#define OP_LB 040
#define OP_LH 041
@@ -257,6 +258,11 @@
#define OP_MUL 002 /* QED */
/*
+ * Values for the 'func' field when 'op' == OP_SPECIAL3.
+ */
+#define OP_RDHWR 073 /* MIPS32r2 */
+
+/*
* Values for the 'func' field when 'op' == OP_BCOND.
*/
#define OP_BLTZ 000
Index: src/sys/arch/mips/mips/mips_emul.c
diff -u src/sys/arch/mips/mips/mips_emul.c:1.18 src/sys/arch/mips/mips/mips_emul.c:1.19
--- src/sys/arch/mips/mips/mips_emul.c:1.18 Sun Jun 27 13:44:26 2010
+++ src/sys/arch/mips/mips/mips_emul.c Wed Jul 7 01:23:42 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: mips_emul.c,v 1.18 2010/06/27 13:44:26 simonb Exp $ */
+/* $NetBSD: mips_emul.c,v 1.19 2010/07/07 01:23:42 chs Exp $ */
/*
* Copyright (c) 1999 Shuichiro URATA. All rights reserved.
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mips_emul.c,v 1.18 2010/06/27 13:44:26 simonb Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mips_emul.c,v 1.19 2010/07/07 01:23:42 chs Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -54,6 +54,7 @@
void MachEmulateLWC0(uint32_t, struct frame *, uint32_t);
void MachEmulateSWC0(uint32_t, struct frame *, uint32_t);
void MachEmulateSpecial(uint32_t, struct frame *, uint32_t);
+void MachEmulateSpecial3(uint32_t, struct frame *, uint32_t);
void MachEmulateLWC1(uint32_t, struct frame *, uint32_t);
void MachEmulateLDC1(uint32_t, struct frame *, uint32_t);
void MachEmulateSWC1(uint32_t, struct frame *, uint32_t);
@@ -237,6 +238,9 @@
case OP_SPECIAL:
MachEmulateSpecial(inst, frame, cause);
break;
+ case OP_SPECIAL3:
+ MachEmulateSpecial3(inst, frame, cause);
+ break;
case OP_COP1:
MachEmulateFP(inst, frame, cause);
break;
@@ -389,6 +393,7 @@
MachEmulateSpecial(uint32_t inst, struct frame *frame, uint32_t cause)
{
ksiginfo_t ksi;
+
switch (((InstFmt)inst).RType.func) {
case OP_SYNC:
/* nothing */
@@ -408,6 +413,37 @@
update_pc(frame, cause);
}
+void
+MachEmulateSpecial3(uint32_t inst, struct frame *frame, uint32_t cause)
+{
+ ksiginfo_t ksi;
+ InstFmt instfmt = (InstFmt)inst;
+
+ switch (instfmt.RType.func) {
+ case OP_RDHWR:
+ switch (instfmt.RType.rd) {
+ case 29:
+ frame->f_regs[instfmt.RType.rt] =
+ (mips_reg_t)curlwp->l_private;
+ goto out;
+ }
+ /* FALLTHROUGH */
+ default:
+ frame->f_regs[_R_CAUSE] = cause;
+ frame->f_regs[_R_BADVADDR] = frame->f_regs[_R_PC];
+ KSI_INIT_TRAP(&ksi);
+ ksi.ksi_signo = SIGILL;
+ ksi.ksi_trap = cause;
+ ksi.ksi_code = ILL_ILLOPC;
+ ksi.ksi_addr = (void *)(intptr_t)frame->f_regs[_R_PC];
+ (*curproc->p_emul->e_trapsignal)(curlwp, &ksi);
+ break;
+ }
+
+out:
+ update_pc(frame, cause);
+}
+
#if defined(SOFTFLOAT)
#define LWSWC1_MAXLOOP 12
