Module Name: src
Committed By: jakllsch
Date: Fri Jul 23 02:23:59 UTC 2010
Modified Files:
src/sys/arch/x86/pci: ichlpcib.c pchbvar.h
src/sys/dev/ic: i82801lpcreg.h
Log Message:
Finish cleaning up pchb from recent change.
Use fewer magic numbers in ichlpcib.
Slightly improve style conformance.
Update paths in cpp re-inclusion guards.
To generate a diff of this commit:
cvs rdiff -u -r1.25 -r1.26 src/sys/arch/x86/pci/ichlpcib.c
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/x86/pci/pchbvar.h
cvs rdiff -u -r1.10 -r1.11 src/sys/dev/ic/i82801lpcreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/pci/ichlpcib.c
diff -u src/sys/arch/x86/pci/ichlpcib.c:1.25 src/sys/arch/x86/pci/ichlpcib.c:1.26
--- src/sys/arch/x86/pci/ichlpcib.c:1.25 Fri Jul 23 00:43:21 2010
+++ src/sys/arch/x86/pci/ichlpcib.c Fri Jul 23 02:23:58 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: ichlpcib.c,v 1.25 2010/07/23 00:43:21 jakllsch Exp $ */
+/* $NetBSD: ichlpcib.c,v 1.26 2010/07/23 02:23:58 jakllsch Exp $ */
/*-
* Copyright (c) 2004 The NetBSD Foundation, Inc.
@@ -39,7 +39,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ichlpcib.c,v 1.25 2010/07/23 00:43:21 jakllsch Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ichlpcib.c,v 1.26 2010/07/23 02:23:58 jakllsch Exp $");
#include <sys/types.h>
#include <sys/param.h>
@@ -1241,10 +1241,11 @@
static void
lpcib_fwh_configure(device_t self)
{
- struct lpcib_softc *sc = device_private(self);
-
+ struct lpcib_softc *sc;
pcireg_t pr;
+ sc = device_private(self);
+
if (sc->sc_has_rcba) {
/*
* Very unlikely to find a 82802 on a ICH6 or newer.
@@ -1254,15 +1255,16 @@
} else {
/* Enable FWH write to identify FWH. */
pr = pci_conf_read(sc->sc_pcib.sc_pc, sc->sc_pcib.sc_tag,
- 0x4c);
+ LPCIB_PCI_BIOS_CNTL);
pci_conf_write(sc->sc_pcib.sc_pc, sc->sc_pcib.sc_tag,
- 0x4c, pr|__BIT(16));
+ LPCIB_PCI_BIOS_CNTL, pr|LPCIB_PCI_BIOS_CNTL_BWE);
}
sc->sc_fwhbus = config_found_ia(self, "fwhichbus", NULL, NULL);
- /* disable write */
- pci_conf_write(sc->sc_pcib.sc_pc, sc->sc_pcib.sc_tag, 0x4c, pr);
+ /* restore previous write enable setting */
+ pci_conf_write(sc->sc_pcib.sc_pc, sc->sc_pcib.sc_tag,
+ LPCIB_PCI_BIOS_CNTL, pr);
}
static int
Index: src/sys/arch/x86/pci/pchbvar.h
diff -u src/sys/arch/x86/pci/pchbvar.h:1.6 src/sys/arch/x86/pci/pchbvar.h:1.7
--- src/sys/arch/x86/pci/pchbvar.h:1.6 Fri Jul 23 00:43:21 2010
+++ src/sys/arch/x86/pci/pchbvar.h Fri Jul 23 02:23:58 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: pchbvar.h,v 1.6 2010/07/23 00:43:21 jakllsch Exp $ */
+/* $NetBSD: pchbvar.h,v 1.7 2010/07/23 02:23:58 jakllsch Exp $ */
/*-
* Copyright (c) 2000 The NetBSD Foundation, Inc.
@@ -29,11 +29,8 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
-#ifndef _I386_PCI_PCHBVAR_H_
-#define _I386_PCI_PCHBVAR_H_
-
-#include <sys/callout.h>
-#include <sys/rnd.h>
+#ifndef _X86_PCI_PCHBVAR_H_
+#define _X86_PCI_PCHBVAR_H_
struct pchb_softc {
device_t sc_dev;
@@ -44,7 +41,4 @@
pcireg_t sc_pciconfext[48];
};
-void pchb_attach_rnd(struct pchb_softc *, struct pci_attach_args *);
-void pchb_detach_rnd(struct pchb_softc *);
-
-#endif /* _I386_PCI_PCHBVAR_H_ */
+#endif /* _X86_PCI_PCHBVAR_H_ */
Index: src/sys/dev/ic/i82801lpcreg.h
diff -u src/sys/dev/ic/i82801lpcreg.h:1.10 src/sys/dev/ic/i82801lpcreg.h:1.11
--- src/sys/dev/ic/i82801lpcreg.h:1.10 Sun Sep 27 17:55:32 2009
+++ src/sys/dev/ic/i82801lpcreg.h Fri Jul 23 02:23:58 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: i82801lpcreg.h,v 1.10 2009/09/27 17:55:32 jakllsch Exp $ */
+/* $NetBSD: i82801lpcreg.h,v 1.11 2010/07/23 02:23:58 jakllsch Exp $ */
/*-
* Copyright (c) 2004 The NetBSD Foundation, Inc.
@@ -34,8 +34,8 @@
* register definitions.
*/
-#ifndef _DEV_IC_I82801LPGREG_H_
-#define _DEV_IC_I82801LPGREG_H_
+#ifndef _DEV_IC_I82801LPCREG_H_
+#define _DEV_IC_I82801LPCREG_H_
/*
* PCI configuration registers
*/
@@ -45,7 +45,9 @@
/* GPIO config registers ICH6+ */
#define LPCIB_PCI_GPIO_BASE_ICH6 0x48
#define LPCIB_PCI_GPIO_CNTL_ICH6 0x4c
-#define LPCIB_PCI_BIOS_CNTL 0x4e
+#define LPCIB_PCI_BIOS_CNTL 0x4c /* actually 0x4e */
+#define LPCIB_PCI_BIOS_CNTL_BWE (0x0001 << 16) /* write enable */
+#define LPCIB_PCI_BIOS_CNTL_BLE (0x0002 << 16) /* lock enable */
#define LPCIB_PCI_TCO_CNTL 0x54
/* GPIO config registers ICH0-ICH5 */
#define LPCIB_PCI_GPIO_BASE 0x58
@@ -297,4 +299,4 @@
#define LPCIB_TCOTIMER_MAX_TICK 0x3f /* 39 seconds max */
#define LPCIB_TCOTIMER2_MAX_TICK 0x265 /* 613 seconds max */
-#endif /* _DEV_IC_I82801LPGREG_H_ */
+#endif /* _DEV_IC_I82801LPCREG_H_ */
