Module Name:    src
Committed By:   bouyer
Date:           Tue Aug 31 10:50:22 UTC 2010

Modified Files:
        src/sys/arch/x86/x86 [netbsd-5]: intel_busclock.c

Log Message:
Pull up following revision(s) (requested by jym in ticket #1439):
        sys/arch/x86/x86/intel_busclock.c: revision 1.11
Some core i7 CPUs report model 0c. In this case, check for the extended
model value.
Required to avoid faulting on rdmsr(MSR_FSB_FREQ) early during boot.
Will ask for a pull-up. This affects GENERIC, and most likely, install iso
too.
XXX quick hack. Obtaining FSB through ACPI should be cleaner.


To generate a diff of this commit:
cvs rdiff -u -r1.5.10.3 -r1.5.10.4 src/sys/arch/x86/x86/intel_busclock.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/x86/x86/intel_busclock.c
diff -u src/sys/arch/x86/x86/intel_busclock.c:1.5.10.3 src/sys/arch/x86/x86/intel_busclock.c:1.5.10.4
--- src/sys/arch/x86/x86/intel_busclock.c:1.5.10.3	Fri Dec 18 05:55:23 2009
+++ src/sys/arch/x86/x86/intel_busclock.c	Tue Aug 31 10:50:22 2010
@@ -1,4 +1,4 @@
-/*	$NetBSD: intel_busclock.c,v 1.5.10.3 2009/12/18 05:55:23 snj Exp $	*/
+/*	$NetBSD: intel_busclock.c,v 1.5.10.4 2010/08/31 10:50:22 bouyer Exp $	*/
 
 /*-
  * Copyright (c) 1999, 2000, 2001 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: intel_busclock.c,v 1.5.10.3 2009/12/18 05:55:23 snj Exp $");
+__KERNEL_RCSID(0, "$NetBSD: intel_busclock.c,v 1.5.10.4 2010/08/31 10:50:22 bouyer Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -96,7 +96,19 @@
 	case 0x9: /* Pentium M (130 nm, Banias) */
 		bus_clock = 10000;
 		break;
-	case 0xc: /* Atom, model 1 */
+	case 0xc: /* Core i7, Atom, model 1 */
+		/*
+		 * XXX (See also case 0xe)
+		 * Some core i7 CPUs can report model 0xc.
+		 * Newer CPUs will GP when attemping to access MSR_FSB_FREQ.
+		 * In the long-term, use ACPI instead of all this.
+		 */
+		switch (CPUID2EXTMODEL(ci->ci_signature)) {
+		case 0x2:
+			aprint_debug("%s: unable to determine bus speed",
+			    device_xname(ci->ci_dev));
+			goto print_msr;
+		}
 		msr = rdmsr(MSR_FSB_FREQ);
 		bus = (msr >> 0) & 0x7;
 		switch (bus) {
@@ -127,7 +139,7 @@
 		break;
 	case 0xe: /* Core Duo/Solo */
 		/*
-		 * XXX
+		 * XXX (See also case 0xc)
 		 * Newer CPUs will GP when attemping to access MSR_FSB_FREQ.
 		 * In the long-term, use ACPI instead of all this.
 		 */

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