Module Name: src
Committed By: jakllsch
Date: Sat Nov 6 14:56:12 UTC 2010
Modified Files:
src/sys/dev/pci: files.pci
Added Files:
src/sys/dev/pci: pciide_sch_reg.h schide.c
Log Message:
Add Intel SCH IDE controller driver.
>From OpenBSD via Tomokazu HARADA in PR#42310.
To generate a diff of this commit:
cvs rdiff -u -r1.330 -r1.331 src/sys/dev/pci/files.pci
cvs rdiff -u -r0 -r1.1 src/sys/dev/pci/pciide_sch_reg.h \
src/sys/dev/pci/schide.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/pci/files.pci
diff -u src/sys/dev/pci/files.pci:1.330 src/sys/dev/pci/files.pci:1.331
--- src/sys/dev/pci/files.pci:1.330 Wed Nov 3 00:49:02 2010
+++ src/sys/dev/pci/files.pci Sat Nov 6 14:56:12 2010
@@ -1,4 +1,4 @@
-# $NetBSD: files.pci,v 1.330 2010/11/03 00:49:02 macallan Exp $
+# $NetBSD: files.pci,v 1.331 2010/11/06 14:56:12 jakllsch Exp $
#
# Config file and device description for machine-independent PCI code.
# Included by ports that need it. Requires that the SCSI files be
@@ -309,6 +309,11 @@
attach satalink at pci
file dev/pci/satalink.c satalink
+# Intel SCH IDE controllers
+device schide: ata, ata_dma, ata_udma, pciide_common, wdc_common
+attach schide at pci
+file dev/pci/schide.c schide
+
# SiS IDE controllers
device siside: ata, ata_dma, ata_udma, pciide_common, wdc_common
attach siside at pci
Added files:
Index: src/sys/dev/pci/pciide_sch_reg.h
diff -u /dev/null src/sys/dev/pci/pciide_sch_reg.h:1.1
--- /dev/null Sat Nov 6 14:56:12 2010
+++ src/sys/dev/pci/pciide_sch_reg.h Sat Nov 6 14:56:12 2010
@@ -0,0 +1,41 @@
+/* $NetBSD: pciide_sch_reg.h,v 1.1 2010/11/06 14:56:12 jakllsch Exp $ */
+/* $OpenBSD: pciidereg.h,v 1.9 2009/10/13 22:05:13 jsg Exp $ */
+
+/*
+ * Copyright (c) 1998 Christopher G. Demetriou. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Christopher G. Demetriou
+ * for the NetBSD Project.
+ * 4. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#define SCH_D0TIM 0x80
+#define SCH_D1TIM 0x84
+#define SCH_TIM_UDMA 0x70000
+#define SCH_TIM_MDMA 0x00300
+#define SCH_TIM_PIO 0x00007
+#define SCH_TIM_SYNCDMA (1 << 31)
+
+#define SCH_TIM_MASK (SCH_TIM_UDMA | SCH_TIM_MDMA | SCH_TIM_PIO)
Index: src/sys/dev/pci/schide.c
diff -u /dev/null src/sys/dev/pci/schide.c:1.1
--- /dev/null Sat Nov 6 14:56:12 2010
+++ src/sys/dev/pci/schide.c Sat Nov 6 14:56:12 2010
@@ -0,0 +1,222 @@
+/* $NetBSD: schide.c,v 1.1 2010/11/06 14:56:12 jakllsch Exp $ */
+/* $OpenBSD: pciide.c,v 1.305 2009/11/01 01:50:15 dlg Exp $ */
+
+/*
+ * Copyright (c) 1999, 2000, 2001 Manuel Bouyer.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/*
+ * Copyright (c) 1996, 1998 Christopher G. Demetriou. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Christopher G. Demetriou
+ * for the NetBSD Project.
+ * 4. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: schide.c,v 1.1 2010/11/06 14:56:12 jakllsch Exp $");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+
+#include <dev/pci/pcivar.h>
+#include <dev/pci/pcidevs.h>
+#include <dev/pci/pciidereg.h>
+#include <dev/pci/pciidevar.h>
+#include <dev/pci/pciide_sch_reg.h>
+
+static void sch_chip_map(struct pciide_softc*, struct pci_attach_args*);
+static void sch_setup_channel(struct ata_channel*);
+static int schide_match(device_t, cfdata_t, void *);
+static void schide_attach(device_t, device_t, void *);
+
+CFATTACH_DECL_NEW(schide, sizeof(struct pciide_softc),
+ schide_match, schide_attach, NULL, NULL);
+
+static const struct pciide_product_desc pciide_sch_products[] = {
+ { PCI_PRODUCT_INTEL_SCH_IDE,
+ 0,
+ "Intel SCH IDE Controller",
+ sch_chip_map,
+ },
+ { 0,
+ 0,
+ NULL,
+ NULL
+ }
+};
+
+static int
+schide_match(device_t parent, cfdata_t match, void *aux)
+{
+ struct pci_attach_args *pa = aux;
+
+ if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_INTEL) {
+ if (pciide_lookup_product(pa->pa_id, pciide_sch_products))
+ return (2);
+ }
+ return (0);
+}
+
+static void
+schide_attach(device_t parent, device_t self, void *aux)
+{
+ struct pci_attach_args *pa = aux;
+ struct pciide_softc *sc = device_private(self);
+
+ sc->sc_wdcdev.sc_atac.atac_dev = self;
+
+ pciide_common_attach(sc, pa,
+ pciide_lookup_product(pa->pa_id, pciide_sch_products));
+
+}
+
+static void
+sch_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
+{
+ struct pciide_channel *cp;
+ pcireg_t interface;
+ int channel;
+
+ if (pciide_chipen(sc, pa) == 0)
+ return;
+
+ aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev,
+ "bus-master DMA support present");
+ pciide_mapreg_dma(sc, pa);
+ aprint_verbose("\n");
+ sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16 | ATAC_CAP_DATA32;
+
+ if (sc->sc_dma_ok) {
+ sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA;
+ sc->sc_wdcdev.irqack = pciide_irqack;
+ }
+ sc->sc_wdcdev.sc_atac.atac_pio_cap = 4;
+ sc->sc_wdcdev.sc_atac.atac_dma_cap = 2;
+ sc->sc_wdcdev.sc_atac.atac_udma_cap = 5;
+ sc->sc_wdcdev.sc_atac.atac_set_modes = sch_setup_channel;
+ sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray;
+ sc->sc_wdcdev.sc_atac.atac_nchannels = 1;
+
+
+ ATADEBUG_PRINT(("sch_setup_chip: old d0tim=0x%x, d1tim=0x%x\n",
+ pci_conf_read(sc->sc_pc, sc->sc_tag, SCH_D0TIM),
+ pci_conf_read(sc->sc_pc, sc->sc_tag, SCH_D1TIM)),
+ DEBUG_PROBE);
+
+ interface = PCI_INTERFACE(pa->pa_class);
+
+ wdc_allocate_regs(&sc->sc_wdcdev);
+
+ for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels;
+ channel++) {
+ cp = &sc->pciide_channels[channel];
+ if (pciide_chansetup(sc, channel, interface) == 0)
+ continue;
+ pciide_mapchan(pa, cp, interface, pciide_pci_intr);
+ }
+
+ ATADEBUG_PRINT(("sch_setup_chip: d0tim=0x%x, d1tim=0x%x\n",
+ pci_conf_read(sc->sc_pc, sc->sc_tag, SCH_D0TIM),
+ pci_conf_read(sc->sc_pc, sc->sc_tag, SCH_D1TIM)),
+ DEBUG_PROBE);
+}
+
+static void
+sch_setup_channel(struct ata_channel *chp)
+{
+ struct ata_drive_datas *drvp;
+ u_int32_t tim, timaddr, idedma_ctl;
+ struct atac_softc *atac = chp->ch_atac;
+ struct pciide_channel *cp = CHAN_TO_PCHAN(chp);
+ struct pciide_softc *sc = CHAN_TO_PCIIDE(chp);
+ int drive, s;
+
+ idedma_ctl = 0;
+
+ /* setup DMA if needed */
+ pciide_channel_dma_setup(cp);
+
+ /* Per drive settings */
+ for (drive = 0; drive < 2; drive++) {
+ drvp = &chp->ch_drive[drive];
+ /* If no drive, skip */
+ if ((drvp->drive_flags & DRIVE) == 0)
+ continue;
+
+ timaddr = (drive == 0) ? SCH_D0TIM : SCH_D1TIM;
+ tim = pci_conf_read(sc->sc_pc, sc->sc_tag, timaddr);
+ tim &= ~SCH_TIM_MASK;
+
+ if (((drvp->drive_flags & DRIVE_DMA) == 0 &&
+ (drvp->drive_flags & DRIVE_UDMA) == 0))
+ goto pio;
+
+ /* add timing values, setup DMA if needed */
+ if ((atac->atac_cap & ATAC_CAP_UDMA) &&
+ (drvp->drive_flags & DRIVE_UDMA)) {
+ /* use Ultra/DMA */
+ tim |= (drvp->UDMA_mode << 16) | SCH_TIM_SYNCDMA;
+ } else {
+ /* use Multiword DMA */
+ s = splbio();
+ drvp->drive_flags &= ~DRIVE_UDMA;
+ splx(s);
+ tim &= ~SCH_TIM_SYNCDMA;
+ }
+ idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
+
+pio: /* use PIO mode */
+
+ tim |= (drvp->DMA_mode << 8) | (drvp->PIO_mode);
+ pci_conf_write(sc->sc_pc, sc->sc_tag, timaddr, tim);
+ }
+ if (idedma_ctl != 0) {
+ /* Add software bits in status register */
+ bus_space_write_1(sc->sc_dma_iot, cp->dma_iohs[IDEDMA_CTL], 0,
+ idedma_ctl);
+ }
+}
