Module Name: src
Committed By: matt
Date: Wed Dec 22 06:13:36 UTC 2010
Modified Files:
src/sys/arch/mips/conf [matt-nb5-mips64]: kern.ldscript
src/sys/arch/mips/include [matt-nb5-mips64]: locore.h
src/sys/arch/mips/mips [matt-nb5-mips64]: locore.S mips_fixup.c
mips_machdep.c spl_stubs.c
Log Message:
Rework how fixups are processed. Inside of generating a table, we just
scan kernel text for jumps to locations between (__stub_start, __stub_end]
and if found, we actually decode the instructions in the stub to find out
where the stub would eventually jump to and then patch the original jump
to jump directly to it bypassing the stub. This is slightly slower than
the previous method but it's a simplier and new stubs get automagically
handled.
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.5.78.1 src/sys/arch/mips/conf/kern.ldscript
cvs rdiff -u -r1.78.36.1.2.25 -r1.78.36.1.2.26 \
src/sys/arch/mips/include/locore.h
cvs rdiff -u -r1.167.38.20 -r1.167.38.21 src/sys/arch/mips/mips/locore.S
cvs rdiff -u -r1.1.2.5 -r1.1.2.6 src/sys/arch/mips/mips/mips_fixup.c
cvs rdiff -u -r1.205.4.1.2.1.2.48 -r1.205.4.1.2.1.2.49 \
src/sys/arch/mips/mips/mips_machdep.c
cvs rdiff -u -r1.1.2.2 -r1.1.2.3 src/sys/arch/mips/mips/spl_stubs.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/conf/kern.ldscript
diff -u src/sys/arch/mips/conf/kern.ldscript:1.5 src/sys/arch/mips/conf/kern.ldscript:1.5.78.1
--- src/sys/arch/mips/conf/kern.ldscript:1.5 Sun Aug 27 04:48:44 2006
+++ src/sys/arch/mips/conf/kern.ldscript Wed Dec 22 06:13:36 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: kern.ldscript,v 1.5 2006/08/27 04:48:44 tsutsui Exp $ */
+/* $NetBSD: kern.ldscript,v 1.5.78.1 2010/12/22 06:13:36 matt Exp $ */
/* ldscript for NetBSD/mips kernels and LKMs */
OUTPUT_ARCH(mips)
@@ -15,6 +15,9 @@
{
_ftext = . ;
*(.text)
+ __stub_start = . ;
+ *(.stub*)
+ __stub_end = . ;
*(.gnu.warning)
} =0
_etext = .;
Index: src/sys/arch/mips/include/locore.h
diff -u src/sys/arch/mips/include/locore.h:1.78.36.1.2.25 src/sys/arch/mips/include/locore.h:1.78.36.1.2.26
--- src/sys/arch/mips/include/locore.h:1.78.36.1.2.25 Thu Jun 10 00:32:11 2010
+++ src/sys/arch/mips/include/locore.h Wed Dec 22 06:13:36 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.h,v 1.78.36.1.2.25 2010/06/10 00:32:11 cliff Exp $ */
+/* $NetBSD: locore.h,v 1.78.36.1.2.26 2010/12/22 06:13:36 matt Exp $ */
/*
* This file should not be included by MI code!!!
@@ -63,98 +63,55 @@
void fixup_splcalls(void); /* splstubs.c */
bool mips_fixup_exceptions(mips_fixup_callback_t);
bool mips_fixup_zero_relative(int32_t, uint32_t [2]);
-void mips_fixup_stubs(uint32_t *, uint32_t *,
- const struct mips_jump_fixup_info *, size_t);
-void fixup_mips_cpu_switch_resume(void);
+void mips_fixup_stubs(uint32_t *, uint32_t *);
+/*
+ * Define these stubs...
+ */
void mips_cpu_switch_resume(struct lwp *);
+void tlb_set_asid(uint32_t);
+void tlb_invalidate_all(void);
+void tlb_invalidate_globals(void);
+void tlb_invalidate_asids(uint32_t, uint32_t);
+void tlb_invalidate_addr(vaddr_t);
+u_int tlb_record_asids(u_long *, uint32_t);
+int tlb_update(vaddr_t, uint32_t);
+void tlb_enter(size_t, vaddr_t, uint32_t);
+void tlb_read_indexed(size_t, struct tlbmask *);
+void wbflush(void);
#ifdef MIPS1
-void mips1_tlb_set_asid(uint32_t);
void mips1_tlb_invalidate_all(void);
-void mips1_tlb_invalidate_globals(void);
-void mips1_tlb_invalidate_asids(uint32_t, uint32_t);
-void mips1_tlb_invalidate_addr(vaddr_t);
-u_int mips1_tlb_record_asids(u_long *, uint32_t);
-int mips1_tlb_update(vaddr_t, uint32_t);
-void mips1_tlb_enter(size_t, vaddr_t, uint32_t);
-void mips1_tlb_read_indexed(size_t, struct tlbmask *);
-void mips1_wbflush(void);
void mips1_lwp_trampoline(void);
void mips1_setfunc_trampoline(void);
-void mips1_cpu_switch_resume(struct lwp *);
uint32_t tx3900_cp0_config_read(void);
#endif
#if defined(MIPS3) || defined(MIPS4)
-void mips3_tlb_set_asid(uint32_t);
void mips3_tlb_invalidate_all(void);
-void mips3_tlb_invalidate_globals(void);
-void mips3_tlb_invalidate_asids(uint32_t, uint32_t);
-void mips3_tlb_invalidate_addr(vaddr_t);
-u_int mips3_tlb_record_asids(u_long *, uint32_t);
-int mips3_tlb_update(vaddr_t, uint32_t);
-void mips3_tlb_enter(size_t, vaddr_t, uint32_t);
-void mips3_tlb_read_indexed(size_t, struct tlbmask *);
-void mips3_tlb_write_indexed_VPS(size_t, struct tlbmask *);
-void mips3_wbflush(void);
void mips3_lwp_trampoline(void);
void mips3_setfunc_trampoline(void);
-void mips3_cpu_switch_resume(struct lwp *);
void mips3_pagezero(void *dst);
#ifdef MIPS3_5900
-void mips5900_tlb_set_asid(uint32_t);
void mips5900_tlb_invalidate_all(void);
-void mips5900_tlb_invalidate_globals(void);
-void mips5900_tlb_invalidate_asids(uint32_t, uint32_t);
-void mips5900_tlb_invalidate_addr(vaddr_t);
-u_int mips5900_tlb_record_asids(u_long *, uint32_t);
-int mips5900_tlb_update(vaddr_t, uint32_t);
-void mips5900_tlb_enter(size_t, vaddr_t, uint32_t);
-void mips5900_tlb_read_indexed(size_t, struct tlbmask *);
-void mips5900_tlb_write_indexed_VPS(size_t, struct tlbmask *);
-void mips5900_wbflush(void);
void mips5900_lwp_trampoline(void);
void mips5900_setfunc_trampoline(void);
-void mips5900_cpu_switch_resume(struct lwp *);
void mips5900_pagezero(void *dst);
#endif
-#endif
+#endif /* MIPS3 || MIPS4 */
#ifdef MIPS32
-void mips32_tlb_set_asid(uint32_t);
void mips32_tlb_invalidate_all(void);
-void mips32_tlb_invalidate_globals(void);
-void mips32_tlb_invalidate_asids(uint32_t, uint32_t);
-void mips32_tlb_invalidate_addr(vaddr_t);
-u_int mips32_tlb_record_asids(u_long *, uint32_t);
-int mips32_tlb_update(vaddr_t, uint32_t);
-void mips32_tlb_enter(size_t, vaddr_t, uint32_t);
-void mips32_tlb_read_indexed(size_t, struct tlbmask *);
-void mips32_tlb_write_indexed_VPS(size_t, struct tlbmask *);
-void mips32_wbflush(void);
void mips32_lwp_trampoline(void);
void mips32_setfunc_trampoline(void);
-void mips32_cpu_switch_resume(struct lwp *);
#endif
#ifdef MIPS64
-void mips64_tlb_set_asid(uint32_t);
void mips64_tlb_invalidate_all(void);
-void mips64_tlb_invalidate_globals(void);
-void mips64_tlb_invalidate_asids(uint32_t, uint32_t);
-void mips64_tlb_invalidate_addr(vaddr_t);
-u_int mips64_tlb_record_asids(u_long *, uint32_t);
-int mips64_tlb_update(vaddr_t, uint32_t);
-void mips64_tlb_enter(size_t, vaddr_t, uint32_t);
-void mips64_tlb_read_indexed(size_t, struct tlbmask *);
-void mips64_tlb_write_indexed_VPS(size_t, struct tlbmask *);
-void mips64_wbflush(void);
void mips64_lwp_trampoline(void);
void mips64_setfunc_trampoline(void);
-void mips64_cpu_switch_resume(struct lwp *);
void mips64_pagezero(void *dst);
#endif
@@ -376,87 +333,23 @@
extern struct locoresw mips_locoresw;
extern void mips_vector_init(const struct splsw *);
-#if defined(MIPS1) && !defined(MIPS3) && !defined(MIPS32) && !defined(MIPS64)
-#define tlb_set_asid mips1_tlb_set_asid
-#define tlb_invalidate_asids mips1_tlb_invalidate_asids
-#define tlb_invalidate_addr mips1_tlb_invalidate_addr
-#define tlb_invalidate_globals mips1_tlb_invalidate_globals
-#define tlb_invalidate_all mips1_tlb_invalidate_all
-#define tlb_record_asids mips1_tlb_record_asids
-#define tlb_update mips1_tlb_update
-#define tlb_enter mips1_tlb_enter
-#define tlb_read_indexed mips1_tlb_read_indexed
-#define wbflush mips1_wbflush
+#if defined(MIPS1) && !defined(MIPS3) && !defined(MIPS32) && !defined(MIPS64)
#define lwp_trampoline mips1_lwp_trampoline
#define setfunc_trampoline mips1_setfunc_trampoline
#elif !defined(MIPS1) && defined(MIPS3) && !defined(MIPS32) && !defined(MIPS64) && !defined(MIPS3_5900)
-#define tlb_set_asid mips3_tlb_set_asid
-#define tlb_invalidate_asids mips3_tlb_invalidate_asids
-#define tlb_invalidate_addr mips3_tlb_invalidate_addr
-#define tlb_invalidate_globals mips3_tlb_invalidate_globals
-#define tlb_invalidate_all mips3_tlb_invalidate_all
-#define tlb_record_asids mips3_tlb_record_asids
-#define tlb_update mips3_tlb_update
-#define tlb_enter mips3_tlb_enter
-#define tlb_read_indexed mips3_tlb_read_indexed
-#define tlb_write_indexed_VPS mips3_tlb_write_indexed_VPS
#define lwp_trampoline mips3_lwp_trampoline
#define setfunc_trampoline mips3_setfunc_trampoline
-#define wbflush mips3_wbflush
#elif !defined(MIPS1) && !defined(MIPS3) && defined(MIPS32) && !defined(MIPS64)
-#define tlb_set_asid mips32_tlb_set_asid
-#define tlb_invalidate_asids mips32_tlb_invalidate_asids
-#define tlb_invalidate_addr mips32_tlb_invalidate_addr
-#define tlb_invalidate_globals mips32_tlb_invalidate_globals
-#define tlb_invalidate_all mips32_tlb_invalidate_all
-#define tlb_record_asids mips32_tlb_record_asids
-#define tlb_update mips32_tlb_update
-#define tlb_enter mips32_tlb_enter
-#define tlb_read_indexed mips32_tlb_read_indexed
-#define tlb_write_indexed_VPS mips32_tlb_write_indexed_VPS
#define lwp_trampoline mips32_lwp_trampoline
#define setfunc_trampoline mips32_setfunc_trampoline
-#define wbflush mips32_wbflush
#elif !defined(MIPS1) && !defined(MIPS3) && !defined(MIPS32) && defined(MIPS64)
/* all common with mips3 */
-#define tlb_set_asid mips64_tlb_set_asid
-#define tlb_invalidate_asids mips64_tlb_invalidate_asids
-#define tlb_invalidate_addr mips64_tlb_invalidate_addr
-#define tlb_invalidate_globals mips64_tlb_invalidate_globals
-#define tlb_invalidate_all mips64_tlb_invalidate_all
-#define tlb_record_asids mips64_tlb_record_asids
-#define tlb_update mips64_tlb_update
-#define tlb_enter mips64_tlb_enter
-#define tlb_read_indexed mips64_tlb_read_indexed
-#define tlb_write_indexed_VPS mips64_tlb_write_indexed_VPS
#define lwp_trampoline mips64_lwp_trampoline
#define setfunc_trampoline mips64_setfunc_trampoline
-#define wbflush mips64_wbflush
#elif !defined(MIPS1) && defined(MIPS3) && !defined(MIPS32) && !defined(MIPS64) && defined(MIPS3_5900)
-#define tlb_set_asid mips5900_tlb_set_asid
-#define tlb_invalidate_asids mips5900_tlb_invalidate_asids
-#define tlb_invalidate_addr mips5900_tlb_invalidate_addr
-#define tlb_invalidate_globals mips5900_tlb_invalidate_globals
-#define tlb_invalidate_all mips5900_tlb_invalidate_all
-#define tlb_record_asids mips5900_tlb_record_asids
-#define tlb_update mips5900_tlb_update
-#define tlb_enter mips5900_tlb_enter
-#define tlb_read_indexed mips5900_tlb_read_indexed
-#define tlb_write_indexed_VPS mips5900_tlb_write_indexed_VPS
#define lwp_trampoline mips5900_lwp_trampoline
#define setfunc_trampoline mips5900_setfunc_trampoline
-#define wbflush mips5900_wbflush
#else
-#define tlb_set_asid (*mips_locore_jumpvec.ljv_tlb_set_asid)
-#define tlb_invalidate_asids (*mips_locore_jumpvec.ljv_tlb_invalidate_asids)
-#define tlb_invalidate_addr (*mips_locore_jumpvec.ljv_tlb_invalidate_addr)
-#define tlb_invalidate_globals (*mips_locore_jumpvec.ljv_tlb_invalidate_globals)
-#define tlb_invalidate_all (*mips_locore_jumpvec.ljv_tlb_invalidate_all)
-#define tlb_record_asids (*mips_locore_jumpvec.ljv_tlb_record_asids)
-#define tlb_update (*mips_locore_jumpvec.ljv_tlb_update)
-#define tlb_enter (*mips_locore_jumpvec.ljv_tlb_enter)
-#define tlb_read_indexed (*mips_locore_jumpvec.ljv_tlb_read_indexed)
-#define wbflush (*mips_locore_jumpvec.ljv_wbflush)
#define lwp_trampoline mips_locoresw.lsw_lwp_trampoline
#define setfunc_trampoline mips_locoresw.lsw_setfunc_trampoline
#endif
Index: src/sys/arch/mips/mips/locore.S
diff -u src/sys/arch/mips/mips/locore.S:1.167.38.20 src/sys/arch/mips/mips/locore.S:1.167.38.21
--- src/sys/arch/mips/mips/locore.S:1.167.38.20 Wed Aug 18 06:35:01 2010
+++ src/sys/arch/mips/mips/locore.S Wed Dec 22 06:13:36 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.167.38.20 2010/08/18 06:35:01 matt Exp $ */
+/* $NetBSD: locore.S,v 1.167.38.21 2010/12/22 06:13:36 matt Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -223,8 +223,7 @@
/*
* Verify interrupt configuration matches IPL_SCHED
*/
- PTR_L t9, _C_LABEL(mips_splsw) + SPLSW_SPLCHECK
- jalr t9
+ jal _C_LABEL(splcheck)
nop
#endif /* PARANOIA */
@@ -236,8 +235,6 @@
/*
* Switch to new context.
*/
- .globl _C_LABEL(__cpu_switchto_fixup)
-_C_LABEL(__cpu_switchto_fixup):
jal _C_LABEL(mips_cpu_switch_resume)
move a0, MIPS_CURLWP
@@ -291,8 +288,7 @@
/*
* Verify interrupt configuration still matches IPL_SCHED
*/
- PTR_L t9, _C_LABEL(mips_splsw) + SPLSW_SPLCHECK
- j t9
+ j _C_LABEL(splcheck)
#else
j ra
#endif /* PARANOIA */
Index: src/sys/arch/mips/mips/mips_fixup.c
diff -u src/sys/arch/mips/mips/mips_fixup.c:1.1.2.5 src/sys/arch/mips/mips/mips_fixup.c:1.1.2.6
--- src/sys/arch/mips/mips/mips_fixup.c:1.1.2.5 Mon Mar 1 19:26:01 2010
+++ src/sys/arch/mips/mips/mips_fixup.c Wed Dec 22 06:13:36 2010
@@ -29,7 +29,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mips_fixup.c,v 1.1.2.5 2010/03/01 19:26:01 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mips_fixup.c,v 1.1.2.6 2010/12/22 06:13:36 matt Exp $");
#include <sys/param.h>
@@ -38,6 +38,7 @@
#include <mips/locore.h>
#include <mips/cache.h>
#include <mips/mips3_pte.h>
+#include <mips/regnum.h>
#define INSN_LUI_P(insn) (((insn) >> 26) == 017)
#define INSN_LW_P(insn) (((insn) >> 26) == 043)
@@ -202,67 +203,86 @@
}
void
-mips_fixup_stubs(uint32_t *start, uint32_t *end,
- const struct mips_jump_fixup_info *fixups,
- size_t nfixups)
+mips_fixup_stubs(uint32_t *start, uint32_t *end)
{
- const uint32_t min_offset = fixups[0].jfi_stub;
- const uint32_t max_offset = fixups[nfixups-1].jfi_stub;
#ifdef DEBUG
size_t fixups_done = 0;
uint32_t cycles = (CPUISMIPS3 ? mips3_cp0_count_read() : 0);
#endif
+ extern uint32_t __stub_start[], __stub_end[];
-#ifdef DIAGNOGSTIC
- /*
- * Verify the fixup list is sorted from low stub to high stub.
- */
- for (const struct mips_jump_fixup_info *jfi = fixups + 1;
- jfi < fixups + nfixups; jfi++) {
- KASSERT(jfi[-1].jfi_stub < jfi[0].jfi_stub);
- }
-#endif
+ KASSERT(MIPS_KSEG0_P(start));
+ KASSERT(MIPS_KSEG0_P(end));
+ KASSERT(MIPS_KSEG0_START == (((intptr_t)start >> 28) << 28));
+
+ if (end > __stub_start)
+ end = __stub_start;
for (uint32_t *insnp = start; insnp < end; insnp++) {
uint32_t insn = *insnp;
uint32_t offset = insn & 0x03ffffff;
uint32_t opcode = insn >> 26;
+ const uint32_t * const stubp =
+ &((uint32_t *)(((intptr_t)insnp >> 28) << 28))[offset];
/*
* First we check to see if this is a jump and whether it is
* within the range we are interested in.
*/
if ((opcode != OPCODE_J && opcode != OPCODE_JAL)
- || offset < min_offset || max_offset < offset)
+ || stubp < __stub_start || __stub_end <= stubp)
continue;
/*
- * We know it's a jump, but does it match one we want to
- * fixup?
+ * Stubs typically look like:
+ * lui v0, %hi(sym)
+ * lX t9, %lo(sym)(v0)
+ * jr t9
+ * nop
+ */
+ const uint32_t lui_insn = stubp[0];
+ const uint32_t load_insn = stubp[1];
+ KASSERT(stubp[2] == 0x03200008); /* jr t9 */
+ KASSERT(stubp[3] == 0); /* nop */
+
+ KASSERT(INSN_LUI_P(lui_insn));
+#ifdef _LP64
+ KASSERT(INSN_LD_P(load_insn));
+#else
+ KASSERT(INSN_LW_P(load_insn));
+#endif
+#ifdef DIAGNOSTIC
+ const u_int lui_reg = (lui_insn >> 16) & 31;
+ const u_int load_reg = (load_insn >> 16) & 31;
+#endif
+ KASSERT(((load_insn >> 21) & 31) == lui_reg);
+ KASSERT(load_reg == _R_T9);
+
+ intptr_t load_addr = ((int16_t)lui_insn << 16) + (int16_t) load_insn;
+#ifdef _LP64
+ const intptr_t real_addr = *(int64_t *)load_addr;
+#else
+ const intptr_t real_addr = *(int32_t *)load_addr;
+#endif
+ /*
+ * Verify the real destination is in the same 256MB
+ * as the location of the jump instruction.
+ */
+ KASSERT((real_addr >> 28) == ((intptr_t)insnp >> 28));
+
+ /*
+ * Now fix it up. Replace the old displacement to the stub
+ * with the real displacement.
*/
- for (const struct mips_jump_fixup_info *jfi = fixups;
- jfi < fixups + nfixups; jfi++) {
- /*
- * The caller has sorted the fixup list from lowest
- * stub to highest stub so if the current offset is
- * less than the this fixup's stub offset, we know
- * can't match anything else in the fixup list.
- */
- if (jfi->jfi_stub > offset)
- break;
-
- if (jfi->jfi_stub == offset) {
- /*
- * Yes, we need to fix it up. Replace the old
- * displacement with the real displacement.
- */
- fixup_mips_jump(insnp, jfi);
+ struct mips_jump_fixup_info fixup = {
+ .jfi_stub = fixup_addr2offset(stubp),
+ .jfi_real = fixup_addr2offset(real_addr),
+ };
+
+ fixup_mips_jump(insnp, &fixup);
#ifdef DEBUG
- fixups_done++;
+ fixups_done++;
#endif
- break;
- }
- }
}
if (sizeof(uint32_t [end - start]) > mips_cache_info.mci_picache_size)
@@ -280,7 +300,19 @@
#endif
}
-void mips_cpu_switch_resume(struct lwp *l) __section(".stub");
+#define __stub __section(".stub")
+
+void mips_cpu_switch_resume(struct lwp *) __stub;
+void tlb_set_asid(uint32_t) __stub;
+void tlb_invalidate_all(void) __stub;
+void tlb_invalidate_globals(void) __stub;
+void tlb_invalidate_asids(uint32_t, uint32_t) __stub;
+void tlb_invalidate_addr(vaddr_t) __stub;
+u_int tlb_record_asids(u_long *, uint32_t) __stub;
+int tlb_update(vaddr_t, uint32_t) __stub;
+void tlb_enter(size_t, vaddr_t, uint32_t) __stub;
+void tlb_read_indexed(size_t, struct tlbmask *) __stub;
+void wbflush(void) __stub;
void
mips_cpu_switch_resume(struct lwp *l)
@@ -289,14 +321,62 @@
}
void
-fixup_mips_cpu_switch_resume(void)
+tlb_set_asid(uint32_t asid)
+{
+ (*mips_locore_jumpvec.ljv_tlb_set_asid)(asid);
+}
+
+void
+tlb_invalidate_all(void)
+{
+ (*mips_locore_jumpvec.ljv_tlb_invalidate_all)();
+}
+
+void
+tlb_invalidate_addr(vaddr_t va)
+{
+ (*mips_locore_jumpvec.ljv_tlb_invalidate_addr)(va);
+}
+
+void
+tlb_invalidate_globals(void)
+{
+ (*mips_locore_jumpvec.ljv_tlb_invalidate_globals)();
+}
+
+void
+tlb_invalidate_asids(uint32_t asid_lo, uint32_t asid_hi)
+{
+ (*mips_locore_jumpvec.ljv_tlb_invalidate_asids)(asid_lo, asid_hi);
+}
+
+u_int
+tlb_record_asids(u_long *bitmap, uint32_t asid_max)
+{
+ return (*mips_locore_jumpvec.ljv_tlb_record_asids)(bitmap, asid_max);
+}
+
+int
+tlb_update(vaddr_t va, uint32_t pte)
+{
+ return (*mips_locore_jumpvec.ljv_tlb_update)(va, pte);
+}
+
+void
+tlb_enter(size_t tlbno, vaddr_t va, uint32_t pte)
{
- extern uint32_t __cpu_switchto_fixup[];
+ (*mips_locore_jumpvec.ljv_tlb_enter)(tlbno, va, pte);
+}
- struct mips_jump_fixup_info fixup = {
- fixup_addr2offset(mips_cpu_switch_resume),
- fixup_addr2offset(mips_locoresw.lsw_cpu_switch_resume)
- };
+void
+tlb_read_indexed(size_t tlbno, struct tlbmask *tlb)
+{
+ (*mips_locore_jumpvec.ljv_tlb_read_indexed)(tlbno, tlb);
+}
- fixup_mips_jump(__cpu_switchto_fixup, &fixup);
+void
+wbflush(void)
+{
+ (*mips_locore_jumpvec.ljv_wbflush)();
}
+
Index: src/sys/arch/mips/mips/mips_machdep.c
diff -u src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.48 src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.49
--- src/sys/arch/mips/mips/mips_machdep.c:1.205.4.1.2.1.2.48 Wed Aug 18 07:12:57 2010
+++ src/sys/arch/mips/mips/mips_machdep.c Wed Dec 22 06:13:36 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: mips_machdep.c,v 1.205.4.1.2.1.2.48 2010/08/18 07:12:57 matt Exp $ */
+/* $NetBSD: mips_machdep.c,v 1.205.4.1.2.1.2.49 2010/12/22 06:13:36 matt Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -112,7 +112,7 @@
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.205.4.1.2.1.2.48 2010/08/18 07:12:57 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.205.4.1.2.1.2.49 2010/12/22 06:13:36 matt Exp $");
#define __INTR_PRIVATE
@@ -1011,10 +1011,11 @@
/*
* Now that the splsw and locoresw have been filled in, fixup the
- * jumps to their stubs to instead jump to the real routines.
+ * jumps to any stubs to actually jump to the real routines.
*/
- fixup_mips_cpu_switch_resume();
- fixup_splcalls();
+ extern uint32_t _ftext[];
+ extern uint32_t _etext[];
+ mips_fixup_stubs(_ftext, _etext);
/* XXX simonb: ugg, another ugly #ifdef check... */
#if (defined(MIPS3) && !defined(MIPS3_5900)) || defined(MIPS32) || defined(MIPS64)
Index: src/sys/arch/mips/mips/spl_stubs.c
diff -u src/sys/arch/mips/mips/spl_stubs.c:1.1.2.2 src/sys/arch/mips/mips/spl_stubs.c:1.1.2.3
--- src/sys/arch/mips/mips/spl_stubs.c:1.1.2.2 Mon Mar 1 19:26:01 2010
+++ src/sys/arch/mips/mips/spl_stubs.c Wed Dec 22 06:13:36 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: spl_stubs.c,v 1.1.2.2 2010/03/01 19:26:01 matt Exp $ */
+/* $NetBSD: spl_stubs.c,v 1.1.2.3 2010/12/22 06:13:36 matt Exp $ */
/*-
* Copyright (c) 2010 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -30,7 +30,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: spl_stubs.c,v 1.1.2.2 2010/03/01 19:26:01 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: spl_stubs.c,v 1.1.2.3 2010/12/22 06:13:36 matt Exp $");
#define __INTR_PRIVATE
@@ -152,46 +152,3 @@
{
(*mips_splsw.splsw_splcheck)();
}
-
-void
-fixup_splcalls(void)
-{
- extern uint32_t _ftext[];
- extern uint32_t _etext[];
-
-#define splfixupinfo(x) { fixup_addr2offset(x), \
- fixup_addr2offset(mips_splsw.splsw_##x) }
- struct mips_jump_fixup_info fixups[] = {
- splfixupinfo(splhigh),
- splfixupinfo(splhigh_noprof),
- splfixupinfo(splsched),
- splfixupinfo(splvm),
- splfixupinfo(splsoftserial),
- splfixupinfo(splsoftnet),
- splfixupinfo(splsoftbio),
- splfixupinfo(splsoftclock),
- splfixupinfo(spl0),
- splfixupinfo(splx),
- splfixupinfo(splx_noprof),
- splfixupinfo(splraise),
- splfixupinfo(splintr),
- splfixupinfo(_setsoftintr),
- splfixupinfo(_clrsoftintr),
- splfixupinfo(splcheck),
- };
-
- /*
- * [bubble] sort fixups from lowest stub to highest stub.
- */
- for (size_t i = 0; i < __arraycount(fixups) - 1; i++) {
- for (size_t j = i + 1; j < __arraycount(fixups); j++) {
- if (fixups[i].jfi_stub > fixups[j].jfi_stub) {
- struct mips_jump_fixup_info tmp = fixups[i];
- fixups[i] = fixups[j];
- fixups[j] = tmp;
- }
- }
- }
-
- mips_fixup_stubs(_ftext, _etext, fixups, __arraycount(fixups));
-}
