Module Name:    src
Committed By:   mrg
Date:           Tue Feb 15 09:56:33 UTC 2011

Modified Files:
        src/sys/arch/sparc/sparc: intr.c pmap.c timer_sun4m.c

Log Message:
sprinkle some kpreempt_{dis,en}able() in various strategic points
we will need when we get to actually enabling kernel preemption.


To generate a diff of this commit:
cvs rdiff -u -r1.112 -r1.113 src/sys/arch/sparc/sparc/intr.c
cvs rdiff -u -r1.340 -r1.341 src/sys/arch/sparc/sparc/pmap.c
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/sparc/sparc/timer_sun4m.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/sparc/sparc/intr.c
diff -u src/sys/arch/sparc/sparc/intr.c:1.112 src/sys/arch/sparc/sparc/intr.c:1.113
--- src/sys/arch/sparc/sparc/intr.c:1.112	Tue Feb 15 09:05:14 2011
+++ src/sys/arch/sparc/sparc/intr.c	Tue Feb 15 09:56:32 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: intr.c,v 1.112 2011/02/15 09:05:14 mrg Exp $ */
+/*	$NetBSD: intr.c,v 1.113 2011/02/15 09:56:32 mrg Exp $ */
 
 /*
  * Copyright (c) 1992, 1993
@@ -41,7 +41,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.112 2011/02/15 09:05:14 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.113 2011/02/15 09:56:32 mrg Exp $");
 
 #include "opt_multiprocessor.h"
 #include "opt_sparc_arch.h"
@@ -353,6 +353,8 @@
 xcallintr(void *v)
 {
 
+	kpreempt_disable();
+
 	/* Tally */
 	if (v != xcallintr)
 		cpuinfo.ci_sintrcnt[13].ev_count++;
@@ -370,6 +372,8 @@
 	}
 	cpuinfo.msg.tag = 0;
 	cpuinfo.msg.complete = 1;
+
+	kpreempt_enable();
 }
 #endif /* MULTIPROCESSOR */
 #endif /* SUN4M || SUN4D */
@@ -843,6 +847,11 @@
 bool
 cpu_intr_p(void)
 {
+	int idepth;
+
+	kpreempt_disable();
+	idepth = curcpu()->ci_idepth;
+	kpreempt_enable();
 
-	return curcpu()->ci_idepth != 0;
+	return idepth != 0;
 }

Index: src/sys/arch/sparc/sparc/pmap.c
diff -u src/sys/arch/sparc/sparc/pmap.c:1.340 src/sys/arch/sparc/sparc/pmap.c:1.341
--- src/sys/arch/sparc/sparc/pmap.c:1.340	Mon Apr 26 09:26:25 2010
+++ src/sys/arch/sparc/sparc/pmap.c	Tue Feb 15 09:56:32 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: pmap.c,v 1.340 2010/04/26 09:26:25 martin Exp $ */
+/*	$NetBSD: pmap.c,v 1.341 2011/02/15 09:56:32 mrg Exp $ */
 
 /*
  * Copyright (c) 1996
@@ -56,7 +56,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.340 2010/04/26 09:26:25 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.341 2011/02/15 09:56:32 mrg Exp $");
 
 #include "opt_ddb.h"
 #include "opt_kgdb.h"
@@ -818,7 +818,9 @@
 setpgt4m(int *ptep, int pte)
 {
 
+	kpreempt_disable();
 	swap(ptep, pte);
+	kpreempt_enable();
 }
 
 inline void
@@ -829,9 +831,11 @@
 #if defined(MULTIPROCESSOR)
 	updatepte4m(va, ptep, 0xffffffff, pte, pageflush ? ctx : 0, cpuset);
 #else
+	kpreempt_disable();
 	if (__predict_true(pageflush))
 		tlb_flush_page(va, ctx, 0);
 	setpgt4m(ptep, pte);
+	kpreempt_enable();
 #endif /* MULTIPROCESSOR */
 }
 
@@ -6247,6 +6251,7 @@
 	rp = &pm->pm_regmap[vr];
 	sp = &rp->rg_segmap[vs];
 
+	kpreempt_disable();
 	s = splvm();		/* XXX way too conservative */
 	PMAP_LOCK();
 
@@ -6261,9 +6266,8 @@
 		if ((tpte & SRMMU_PPNMASK) == (pteproto & SRMMU_PPNMASK)) {
 			/* just changing protection and/or wiring */
 			pmap_changeprot4m(pm, va, prot, flags);
-			PMAP_UNLOCK();
-			splx(s);
-			return (0);
+			error = 0;
+			goto out;
 		}
 
 		if ((tpte & SRMMU_PGTYPE) == PG_SUN4M_OBMEM) {
@@ -6309,6 +6313,7 @@
 out:
 	PMAP_UNLOCK();
 	splx(s);
+	kpreempt_enable();
 	return (error);
 }
 
@@ -6438,9 +6443,8 @@
 				/* just changing prot and/or wiring */
 				/* caller should call this directly: */
 				pmap_changeprot4m(pm, va, prot, flags);
-				PMAP_UNLOCK();
-				splx(s);
-				return (0);
+				error = 0;
+				goto out;
 			}
 			/*
 			 * Switcheroo: changing pa for this va.
@@ -6551,6 +6555,7 @@
 	 * The kernel pmap doesn't need to be locked, but the demap lock
 	 * in updatepte() requires interrupt protection.
 	 */
+	kpreempt_disable();
 	s = splvm();
 
 	endva = va + len;
@@ -6596,6 +6601,7 @@
 		}
 	}
 	splx(s);
+	kpreempt_enable();
 }
 
 /*
@@ -6616,6 +6622,7 @@
 	 * The kernel pmap doesn't need to be locked, but the demap lock
 	 * in updatepte() requires interrupt protection.
 	 */
+	kpreempt_disable();
 	s = splvm();
 
 	while (size > 0) {
@@ -6639,6 +6646,7 @@
 		size -= NBPG;
 	}
 	splx(s);
+	kpreempt_enable();
 }
 #endif /* SUN4M || SUN4D */
 
@@ -6654,6 +6662,7 @@
 	struct segmap *sp;
 	bool owired;
 
+	kpreempt_disable();
 	vr = VA_VREG(va);
 	vs = VA_VSEG(va);
 	rp = &pm->pm_regmap[vr];
@@ -6672,6 +6681,7 @@
 	if (!owired) {
 		pmap_stats.ps_useless_changewire++;
 		return;
+		kpreempt_enable();
 	}
 
 	pm->pm_stats.wired_count--;
@@ -6686,6 +6696,7 @@
 			mmu_pmeg_unlock(sp->sg_pmeg);
 	}
 #endif /* SUN4 || SUN4C */
+	kpreempt_enable();
 }
 
 /*
@@ -7088,6 +7099,7 @@
 	void *va;
 	int pte;
 
+	kpreempt_disable();
 	if ((pg = PHYS_TO_VM_PAGE(pa)) != NULL) {
 		/*
 		 * The following VAC flush might not be necessary since the
@@ -7115,6 +7127,7 @@
 	 */
 	sp_tlb_flush((int)va, 0, ASI_SRMMUFP_L3);
 	setpgt4m(cpuinfo.vpage_pte[0], SRMMU_TEINVALID);
+	kpreempt_enable();
 }
 
 /*
@@ -7127,6 +7140,7 @@
 	u_int stream_data_addr = MXCC_STREAM_DATA;
 	uint64_t v = (uint64_t)pa;
 
+	kpreempt_disable();
 	/* Load MXCC stream data register with 0 (bottom 32 bytes only) */
 	stda(stream_data_addr+0, ASI_CONTROL, 0);
 	stda(stream_data_addr+8, ASI_CONTROL, 0);
@@ -7138,6 +7152,7 @@
 	for (offset = 0; offset < NBPG; offset += MXCC_STREAM_BLKSZ) {
 		stda(MXCC_STREAM_DST, ASI_CONTROL, v | offset);
 	}
+	kpreempt_enable();
 }
 
 /*
@@ -7151,6 +7166,7 @@
 	int pte;
 	int offset;
 
+	kpreempt_disable();
 	/*
 	 * We still have to map the page, since ASI_BLOCKFILL
 	 * takes virtual addresses. This also means we have to
@@ -7177,6 +7193,7 @@
 	/* Remove temporary mapping */
 	sp_tlb_flush((int)va, 0, ASI_SRMMUFP_L3);
 	setpgt4m(cpuinfo.vpage_pte[0], SRMMU_TEINVALID);
+	kpreempt_enable();
 }
 
 /*
@@ -7195,6 +7212,7 @@
 	void *sva, *dva;
 	int spte, dpte;
 
+	kpreempt_disable();
 	if ((pg = PHYS_TO_VM_PAGE(src)) != NULL) {
 		if (CACHEINFO.c_vactype == VAC_WRITEBACK)
 			pv_flushcache4m(pg);
@@ -7225,6 +7243,7 @@
 	setpgt4m(cpuinfo.vpage_pte[0], SRMMU_TEINVALID);
 	sp_tlb_flush((int)dva, 0, ASI_SRMMUFP_L3);
 	setpgt4m(cpuinfo.vpage_pte[1], SRMMU_TEINVALID);
+	kpreempt_enable();
 }
 
 /*
@@ -7237,6 +7256,7 @@
 	uint64_t v1 = (uint64_t)src;
 	uint64_t v2 = (uint64_t)dst;
 
+	kpreempt_disable();
 	/* Enable cache-coherency */
 	v1 |= MXCC_STREAM_C;
 	v2 |= MXCC_STREAM_C;
@@ -7246,6 +7266,7 @@
 		stda(MXCC_STREAM_SRC, ASI_CONTROL, v1 | offset);
 		stda(MXCC_STREAM_DST, ASI_CONTROL, v2 | offset);
 	}
+	kpreempt_enable();
 }
 
 /*
@@ -7259,6 +7280,7 @@
 	int spte, dpte;
 	int offset;
 
+	kpreempt_disable();
 	/*
 	 * We still have to map the pages, since ASI_BLOCKCOPY
 	 * takes virtual addresses. This also means we have to
@@ -7297,6 +7319,7 @@
 	setpgt4m(cpuinfo.vpage_pte[0], SRMMU_TEINVALID);
 	sp_tlb_flush((int)dva, 0, ASI_SRMMUFP_L3);
 	setpgt4m(cpuinfo.vpage_pte[1], SRMMU_TEINVALID);
+	kpreempt_enable();
 }
 #endif /* SUN4M || SUN4D */
 

Index: src/sys/arch/sparc/sparc/timer_sun4m.c
diff -u src/sys/arch/sparc/sparc/timer_sun4m.c:1.24 src/sys/arch/sparc/sparc/timer_sun4m.c:1.25
--- src/sys/arch/sparc/sparc/timer_sun4m.c:1.24	Mon Feb 14 10:21:05 2011
+++ src/sys/arch/sparc/sparc/timer_sun4m.c	Tue Feb 15 09:56:32 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: timer_sun4m.c,v 1.24 2011/02/14 10:21:05 mrg Exp $	*/
+/*	$NetBSD: timer_sun4m.c,v 1.25 2011/02/15 09:56:32 mrg Exp $	*/
 
 /*
  * Copyright (c) 1992, 1993
@@ -58,7 +58,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: timer_sun4m.c,v 1.24 2011/02/14 10:21:05 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: timer_sun4m.c,v 1.25 2011/02/15 09:56:32 mrg Exp $");
 
 #include <sys/param.h>
 #include <sys/kernel.h>
@@ -100,6 +100,7 @@
 schedintr_4m(void *v)
 {
 
+	kpreempt_disable();
 #ifdef MULTIPROCESSOR
 	/*
 	 * We call hardclock() here so that we make sure it is called on
@@ -116,6 +117,7 @@
 	if ((++cpuinfo.ci_schedstate.spc_schedticks & 7) == 0 && schedhz != 0)
 #endif
 		schedclock(curlwp);
+	kpreempt_enable();
 }
 
 
@@ -138,12 +140,14 @@
 	 * For MP, we defer calling hardclock() to the schedintr so
 	 * that we call it on all cpus.
 	 */
+	kpreempt_disable();
 	if (cold)
 		return 0;
 	/* read the limit register to clear the interrupt */
 	*((volatile int *)&timerreg4m->t_limit);
 	tickle_tc();
 	hardclock((struct clockframe *)cap);
+	kpreempt_enable();
 	return (1);
 }
 
@@ -156,6 +160,8 @@
 	struct clockframe *frame = cap;
 	u_long newint;
 
+	kpreempt_disable();
+
 	/* read the limit register to clear the interrupt */
 	*((volatile int *)&counterreg4m->t_limit);
 
@@ -194,6 +200,7 @@
 #if !defined(MULTIPROCESSOR)
 	}
 #endif
+	kpreempt_enable();
 
 	return (1);
 }

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