Module Name: src
Committed By: matt
Date: Thu Feb 17 14:24:12 UTC 2011
Added Files:
src/sys/arch/mips/sibyte/pci: sbbrz.c sbbrz_bus_io.c sbbrz_bus_mem.c
sbbrz_pci.c sbbrzvar.h sbpcihb.c
Log Message:
Add PCI support for BCM1125/1250.
To generate a diff of this commit:
cvs rdiff -u -r0 -r1.2 src/sys/arch/mips/sibyte/pci/sbbrz.c \
src/sys/arch/mips/sibyte/pci/sbbrz_bus_io.c \
src/sys/arch/mips/sibyte/pci/sbbrz_bus_mem.c \
src/sys/arch/mips/sibyte/pci/sbbrz_pci.c \
src/sys/arch/mips/sibyte/pci/sbbrzvar.h \
src/sys/arch/mips/sibyte/pci/sbpcihb.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Added files:
Index: src/sys/arch/mips/sibyte/pci/sbbrz.c
diff -u /dev/null src/sys/arch/mips/sibyte/pci/sbbrz.c:1.2
--- /dev/null Thu Feb 17 14:24:12 2011
+++ src/sys/arch/mips/sibyte/pci/sbbrz.c Thu Feb 17 14:24:12 2011
@@ -0,0 +1,221 @@
+/* $NetBSD: sbbrz.c,v 1.2 2011/02/17 14:24:12 matt Exp $ */
+
+/*
+ * Copyright 2000, 2001
+ * Broadcom Corporation. All rights reserved.
+ *
+ * This software is furnished under license and may be used and copied only
+ * in accordance with the following terms and conditions. Subject to these
+ * conditions, you may download, copy, install, use, modify and distribute
+ * modified or unmodified copies of this software in source and/or binary
+ * form. No title or ownership is transferred hereby.
+ *
+ * 1) Any source code used, modified or distributed must reproduce and
+ * retain this copyright notice and list of conditions as they appear in
+ * the source file.
+ *
+ * 2) No right is granted to use any trade name, trademark, or logo of
+ * Broadcom Corporation. Neither the "Broadcom Corporation" name nor any
+ * trademark or logo of Broadcom Corporation may be used to endorse or
+ * promote products derived from this software without the prior written
+ * permission of Broadcom Corporation.
+ *
+ * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR
+ * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE
+ * FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE
+ * LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/* from: $NetBSD: apecs.c,v 1.38 2000/06/29 08:58:45 mrg Exp */
+
+/*-
+ * Copyright (c) 2000, 2010 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (c) 1995, 1996 Carnegie-Mellon University.
+ * All rights reserved.
+ *
+ * Author: Chris G. Demetriou
+ *
+ * Permission to use, copy, modify and distribute this software and
+ * its documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ * Software Distribution Coordinator or [email protected]
+ * School of Computer Science
+ * Carnegie Mellon University
+ * Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+/*
+ * Driver for SB-1250 I/O bridge 0, which provides the PCI and LDT
+ * interfaces.
+ */
+
+#define _MIPS_BUS_DMA_PRIVATE
+
+#include <sys/param.h>
+#include <sys/device.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcivar.h>
+#include <dev/pci/pcidevs.h>
+
+#include <mips/locore.h>
+#include <mips/sibyte/include/sb1250_regs.h>
+#include <mips/sibyte/include/sb1250_scd.h>
+#include <mips/sibyte/include/zbbusvar.h>
+#include <mips/sibyte/pci/sbbrzvar.h>
+
+static int sbbrz_match(device_t, cfdata_t, void *);
+static void sbbrz_attach(device_t, device_t, void *);
+
+CFATTACH_DECL_NEW(sbbrz, 0, sbbrz_match, sbbrz_attach, NULL, NULL);
+
+static int sbbrz_print(void *, const char *pnp);
+
+/* There can be only one. */
+struct sbbrz_softc sbbrz_softc;
+
+static int
+sbbrz_match(device_t parent, cfdata_t match, void *aux)
+{
+ struct zbbus_attach_args *zap = aux;
+
+ if (zap->za_locs.za_type != ZBBUS_ENTTYPE_BRZ)
+ return (0);
+
+ if (sbbrz_softc.sc_dev != NULL)
+ return (0);
+
+ return 1;
+}
+
+/*
+ * Set up the chipset's function pointers.
+ */
+static void
+sbbrz_init(struct sbbrz_softc *sc)
+{
+ int error;
+
+ sbbrz_bus_io_init(&sc->sc_iot, sc);
+ sbbrz_bus_mem_init(&sc->sc_memt, sc);
+
+ bus_dma_tag_t t = &sc->sc_dmat64;
+ t->_cookie = sc;
+ t->_wbase = 0;
+ t->_bounce_alloc_lo = 0;
+ t->_bounce_alloc_hi = 0;
+ t->_dmamap_ops = mips_bus_dmamap_ops;
+ t->_dmamem_ops = mips_bus_dmamem_ops;
+ t->_dmatag_ops = mips_bus_dmatag_ops;
+
+ error = bus_dmatag_subregion(t, 0, (bus_addr_t)1 << 32, &sc->sc_dmat32, 0);
+ if (error)
+ panic("%s: failed to create 32bit dma tag: %d",
+ __func__, error);
+
+ sbbrz_pci_init(&sc->sc_pc, sc);
+}
+
+static void
+sbbrz_attach(device_t parent, device_t self, void *aux)
+{
+ struct sbbrz_softc *sc = &sbbrz_softc;
+ struct pcibus_attach_args pba;
+ uint64_t regval;
+ bool host;
+
+ /* Tell the user whether it's host or device mode. */
+ regval = mips3_ld((void *)MIPS_PHYS_TO_KSEG1(A_SCD_SYSTEM_CFG));
+ host = (regval & M_SYS_PCI_HOST) != 0;
+
+ aprint_normal(": %s pci mode\n", host ? "host" : "device");
+
+ /* note that we've attached the bridge; can't have two. */
+ sc->sc_dev = self;
+ self->dv_private = sc;
+
+ /*
+ * set up the bridge's info; done once at console init time
+ * (maybe), but doesn't hurt to do twice.
+ */
+ sbbrz_init(sc);
+
+#if _has_pba_busname
+ pba.pba_busname = "pci";
+#endif
+ pba.pba_iot = &sc->sc_iot;
+ pba.pba_memt = &sc->sc_memt;
+ pba.pba_dmat64 = &sc->sc_dmat64;
+ pba.pba_dmat = sc->sc_dmat32;
+ pba.pba_pc = &sc->sc_pc;
+ pba.pba_bus = 0;
+ pba.pba_bridgetag = NULL;
+ pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED |
+ PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | PCI_FLAGS_MWI_OKAY;
+ config_found(self, &pba, sbbrz_print);
+}
+
+static int
+sbbrz_print(void *aux, const char *pnp)
+{
+ struct pcibus_attach_args *pba = aux;
+
+ /* only PCIs can attach to sbbrz; easy. */
+ if (pnp)
+#if _has_pba_busname
+ aprint_normal("%s at %s\n", pba->pba_busname, pnp);
+#else
+ aprint_normal("\n* sbbrz_pci at %s", pnp);
+#endif
+ aprint_normal(" bus %d", pba->pba_bus);
+ return (UNCONF);
+}
Index: src/sys/arch/mips/sibyte/pci/sbbrz_bus_io.c
diff -u /dev/null src/sys/arch/mips/sibyte/pci/sbbrz_bus_io.c:1.2
--- /dev/null Thu Feb 17 14:24:12 2011
+++ src/sys/arch/mips/sibyte/pci/sbbrz_bus_io.c Thu Feb 17 14:24:12 2011
@@ -0,0 +1,57 @@
+/* $NetBSD: sbbrz_bus_io.c,v 1.2 2011/02/17 14:24:12 matt Exp $ */
+
+/*-
+ * Copyright (c) 2001, 2010 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Platform-specific PCI bus I/O support for the BCM1250/BCM1125.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: sbbrz_bus_io.c,v 1.2 2011/02/17 14:24:12 matt Exp $");
+
+#include <sys/param.h>
+
+#include <mips/sibyte/include/sb1250_regs.h>
+#include <mips/sibyte/pci/sbbrzvar.h>
+
+#define CHIP sbbrz
+#define CHIP_IO /* defined */
+#define CHIP_LITTLE_ENDIAN
+
+#define CHIP_EX_MALLOC_SAFE(v) true
+#define CHIP_EXTENT(v) (((struct sbbrz_softc *)(v))->sc_io_ex)
+
+/* IO region 1 */
+#define CHIP_W1_BUS_START(v) 0x00008000UL
+#define CHIP_W1_BUS_END(v) 0x02000000UL
+#define CHIP_W1_SYS_START(v) (A_PHYS_LDTPCI_IO_MATCH_BYTES + CHIP_W1_BUS_START(v))
+#define CHIP_W1_SYS_END(v) (A_PHYS_LDTPCI_IO_MATCH_BYTES + CHIP_W1_BUS_END(v))
+
+#include <mips/mips/bus_space_alignstride_chipdep.c>
Index: src/sys/arch/mips/sibyte/pci/sbbrz_bus_mem.c
diff -u /dev/null src/sys/arch/mips/sibyte/pci/sbbrz_bus_mem.c:1.2
--- /dev/null Thu Feb 17 14:24:12 2011
+++ src/sys/arch/mips/sibyte/pci/sbbrz_bus_mem.c Thu Feb 17 14:24:12 2011
@@ -0,0 +1,57 @@
+/* $NetBSD: sbbrz_bus_mem.c,v 1.2 2011/02/17 14:24:12 matt Exp $ */
+
+/*-
+ * Copyright (c) 2001 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Platform-specific PCI bus memory support for the BCM1250/1125.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: sbbrz_bus_mem.c,v 1.2 2011/02/17 14:24:12 matt Exp $");
+
+#include <sys/param.h>
+
+#include <mips/sibyte/include/sb1250_regs.h>
+#include <mips/sibyte/pci/sbbrzvar.h>
+
+#define CHIP sbbrz
+#define CHIP_MEM /* defined */
+#define CHIP_LITTLE_ENDIAN
+
+#define CHIP_EX_MALLOC_SAFE(v) true
+#define CHIP_EXTENT(v) (((struct sbbrz_softc *)(v))->sc_mem_ex)
+
+/* MEM region 1 */
+#define CHIP_W1_BUS_START(v) (A_PHYS_LDTPCI_IO_MATCH_BYTES_32 + 0x01000000)
+#define CHIP_W1_BUS_END(v) (A_PHYS_LDTPCI_IO_MATCH_BYTES_32 + 0x20000000)
+#define CHIP_W1_SYS_START(v) CHIP_W1_BUS_START(v)
+#define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v)
+
+#include <mips/mips/bus_space_alignstride_chipdep.c>
Index: src/sys/arch/mips/sibyte/pci/sbbrz_pci.c
diff -u /dev/null src/sys/arch/mips/sibyte/pci/sbbrz_pci.c:1.2
--- /dev/null Thu Feb 17 14:24:12 2011
+++ src/sys/arch/mips/sibyte/pci/sbbrz_pci.c Thu Feb 17 14:24:12 2011
@@ -0,0 +1,256 @@
+/* $NetBSD: sbbrz_pci.c,v 1.2 2011/02/17 14:24:12 matt Exp $ */
+
+/*
+ * Copyright 2000, 2001
+ * Broadcom Corporation. All rights reserved.
+ *
+ * This software is furnished under license and may be used and copied only
+ * in accordance with the following terms and conditions. Subject to these
+ * conditions, you may download, copy, install, use, modify and distribute
+ * modified or unmodified copies of this software in source and/or binary
+ * form. No title or ownership is transferred hereby.
+ *
+ * 1) Any source code used, modified or distributed must reproduce and
+ * retain this copyright notice and list of conditions as they appear in
+ * the source file.
+ *
+ * 2) No right is granted to use any trade name, trademark, or logo of
+ * Broadcom Corporation. Neither the "Broadcom Corporation" name nor any
+ * trademark or logo of Broadcom Corporation may be used to endorse or
+ * promote products derived from this software without the prior written
+ * permission of Broadcom Corporation.
+ *
+ * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR
+ * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE
+ * FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE
+ * LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/* from: $NetBSD: apecs_pci.c,v 1.18 2000/06/29 08:58:45 mrg Exp */
+
+/*
+ * Copyright (c) 1995, 1996 Carnegie-Mellon University.
+ * All rights reserved.
+ *
+ * Author: Chris G. Demetriou
+ *
+ * Permission to use, copy, modify and distribute this software and
+ * its documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ * Software Distribution Coordinator or [email protected]
+ * School of Computer Science
+ * Carnegie Mellon University
+ * Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
+
+__KERNEL_RCSID(0, "$NetBSD: sbbrz_pci.c,v 1.2 2011/02/17 14:24:12 matt Exp $");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/device.h>
+#include <uvm/uvm_extern.h>
+
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcivar.h>
+
+#include <machine/locore.h>
+#include <mips/sibyte/include/sb1250_regs.h>
+#include <mips/sibyte/include/sb1250_scd.h>
+#include <mips/sibyte/include/sb1250_int.h>
+#include <mips/sibyte/pci/sbbrzvar.h>
+
+void sbbrz_pci_attach_hook(device_t, device_t,
+ struct pcibus_attach_args *);
+static int sbbrz_pci_bus_maxdevs(void *, int);
+static pcitag_t sbbrz_pci_make_tag(void *, int, int, int);
+static void sbbrz_pci_decompose_tag(void *, pcitag_t, int *, int *, int *);
+
+static pcireg_t sbbrz_pci_conf_read(void *, pcitag_t, int);
+static void sbbrz_pci_conf_write(void *, pcitag_t, int, pcireg_t);
+#ifdef PCI_NETBSD_CONFIGURE
+static void sbbrz_pci_conf_interrupt(void *, int, int, int, int, int *);
+#endif
+
+static int sbbrz_pci_intr_map(struct pci_attach_args *,
+ pci_intr_handle_t *);
+static const char *
+ sbbrz_pci_intr_string(void *, pci_intr_handle_t);
+static const struct evcnt *
+ sbbrz_pci_intr_evcnt(void *, pci_intr_handle_t);
+static void * sbbrz_pci_intr_establish(void *, pci_intr_handle_t,
+ int, int (*)(void *), void *);
+static void sbbrz_pci_intr_disestablish(void *, void *);
+
+
+void
+sbbrz_pci_init(pci_chipset_tag_t pc, void *v)
+{
+
+ pc->pc_conf_v = v;
+ pc->pc_attach_hook = sbbrz_pci_attach_hook;
+ pc->pc_bus_maxdevs = sbbrz_pci_bus_maxdevs;
+ pc->pc_make_tag = sbbrz_pci_make_tag;
+ pc->pc_decompose_tag = sbbrz_pci_decompose_tag;
+ pc->pc_conf_read = sbbrz_pci_conf_read;
+ pc->pc_conf_write = sbbrz_pci_conf_write;
+ pc->pc_intr_map = sbbrz_pci_intr_map;
+ pc->pc_intr_string = sbbrz_pci_intr_string;
+ pc->pc_intr_evcnt = sbbrz_pci_intr_evcnt;
+ pc->pc_intr_establish = sbbrz_pci_intr_establish;
+ pc->pc_intr_disestablish = sbbrz_pci_intr_disestablish;
+#ifdef PCI_NETBSD_CONFIGURE
+ pc->pc_conf_interrupt = sbbrz_pci_conf_interrupt;
+#endif
+#ifdef __HAVE_PCIIDE_MACHDEP_COMPAT_INTR_ESTABLISH
+ pc->pc_pciide_compat_intr_establish = sbbrz_pciide_compat_intr_establish;
+#endif
+}
+
+void
+sbbrz_pci_attach_hook(device_t parent, device_t self,
+ struct pcibus_attach_args *pba)
+{
+}
+
+int
+sbbrz_pci_bus_maxdevs(void *cpv, int busno)
+{
+ uint64_t regval;
+ int host;
+
+ /* If not the PCI bus directly off the 1250, always up to 32 devs. */
+ if (busno != 0)
+ return 32;
+
+ /* If the PCI on the 1250, 32 devices if host mode, otherwise only 2. */
+ regval = mips3_ld((void *)MIPS_PHYS_TO_KSEG1(A_SCD_SYSTEM_CFG));
+ host = (regval & M_SYS_PCI_HOST) != 0;
+
+ return (host ? 32 : 2);
+}
+
+pcitag_t
+sbbrz_pci_make_tag(void *cpv, int b, int d, int f)
+{
+
+ return (b << 16) | (d << 11) | (f << 8);
+}
+
+void
+sbbrz_pci_decompose_tag(void *cpv, pcitag_t tag,
+ int *bp, int *dp, int *fp)
+{
+
+ if (bp != NULL)
+ *bp = (tag >> 16) & 0xff;
+ if (dp != NULL)
+ *dp = (tag >> 11) & 0x1f;
+ if (fp != NULL)
+ *fp = (tag >> 8) & 0x7;
+}
+
+pcireg_t
+sbbrz_pci_conf_read(void *cpv, pcitag_t tag, int offset)
+{
+ uint64_t addr;
+
+#ifdef DIAGNOSTIC
+ if ((offset & 0x3) != 0)
+ panic ("pci_conf_read: misaligned");
+#endif
+
+ addr = A_PHYS_LDTPCI_CFG_MATCH_BITS + tag + offset;
+ addr = MIPS_PHYS_TO_XKPHYS(MIPS3_TLB_ATTR_UNCACHED, addr);
+
+ __asm volatile("sync");
+
+ if (badaddr64(addr, 4) != 0)
+ return 0xffffffff;
+
+ return mips3_lw_a64(addr);
+}
+
+void
+sbbrz_pci_conf_write(void *cpv, pcitag_t tag, int offset, pcireg_t data)
+{
+ uint64_t addr;
+
+#ifdef DIAGNOSTIC
+ if ((offset & 0x3) != 0)
+ panic ("pci_conf_write: misaligned");
+#endif
+
+ addr = A_PHYS_LDTPCI_CFG_MATCH_BITS + tag + offset;
+ addr = MIPS_PHYS_TO_XKPHYS(MIPS3_TLB_ATTR_UNCACHED, addr);
+
+ return mips3_sw_a64(addr, data);
+}
+
+int
+sbbrz_pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
+{
+ int bus, device, func;
+ sbbrz_pci_decompose_tag(NULL, pa->pa_intrtag, &bus, &device, &func);
+ *ihp = 0;
+ if (pa->pa_intrpin == PCI_INTERRUPT_PIN_NONE)
+ return EINVAL;
+ if (bus == 0) {
+ *ihp = K_INT_PCI_INTA
+ + (((device-5) + pa->pa_intrswiz + pa->pa_intrpin - PCI_INTERRUPT_PIN_A) % 4);
+ return 0;
+ }
+ return EOPNOTSUPP;
+}
+
+const char *
+sbbrz_pci_intr_string(void *v, pci_intr_handle_t ih)
+{
+ switch (ih) {
+ default: return NULL;
+ case K_INT_PCI_INTA: return "pci inta";
+ case K_INT_PCI_INTB: return "pci intb";
+ case K_INT_PCI_INTC: return "pci intc";
+ case K_INT_PCI_INTD: return "pci intd";
+ }
+}
+
+const struct evcnt *
+sbbrz_pci_intr_evcnt(void *v, pci_intr_handle_t ih)
+{
+ return NULL;
+}
+
+void *
+sbbrz_pci_intr_establish(void *v, pci_intr_handle_t ih, int level,
+ int (*handler)(void *), void *arg)
+{
+ return cpu_intr_establish(ih, level,
+ (void (*)(void *, uint32_t, vaddr_t))handler, arg);
+}
+
+void
+sbbrz_pci_intr_disestablish(void *v, void *ih)
+{
+}
Index: src/sys/arch/mips/sibyte/pci/sbbrzvar.h
diff -u /dev/null src/sys/arch/mips/sibyte/pci/sbbrzvar.h:1.2
--- /dev/null Thu Feb 17 14:24:12 2011
+++ src/sys/arch/mips/sibyte/pci/sbbrzvar.h Thu Feb 17 14:24:12 2011
@@ -0,0 +1,88 @@
+/* $NetBSD: sbbrzvar.h,v 1.2 2011/02/17 14:24:12 matt Exp $ */
+
+/*
+ * Copyright 2000, 2001
+ * Broadcom Corporation. All rights reserved.
+ *
+ * This software is furnished under license and may be used and copied only
+ * in accordance with the following terms and conditions. Subject to these
+ * conditions, you may download, copy, install, use, modify and distribute
+ * modified or unmodified copies of this software in source and/or binary
+ * form. No title or ownership is transferred hereby.
+ *
+ * 1) Any source code used, modified or distributed must reproduce and
+ * retain this copyright notice and list of conditions as they appear in
+ * the source file.
+ *
+ * 2) No right is granted to use any trade name, trademark, or logo of
+ * Broadcom Corporation. Neither the "Broadcom Corporation" name nor any
+ * trademark or logo of Broadcom Corporation may be used to endorse or
+ * promote products derived from this software without the prior written
+ * permission of Broadcom Corporation.
+ *
+ * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR
+ * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE
+ * FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE
+ * LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/* from: $NetBSD: apecsvar.h,v 1.8 1997/09/02 12:40:18 thorpej Exp */
+
+/*
+ * Copyright (c) 1995, 1996 Carnegie-Mellon University.
+ * All rights reserved.
+ *
+ * Author: Chris G. Demetriou
+ *
+ * Permission to use, copy, modify and distribute this software and
+ * its documentation is hereby granted, provided that both the copyright
+ * notice and this permission notice appear in all copies of the
+ * software, derivative works or modified versions, and any portions
+ * thereof, and that both notices appear in supporting documentation.
+ *
+ * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
+ * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
+ * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
+ *
+ * Carnegie Mellon requests users of this software to return to
+ *
+ * Software Distribution Coordinator or [email protected]
+ * School of Computer Science
+ * Carnegie Mellon University
+ * Pittsburgh PA 15213-3890
+ *
+ * any improvements or extensions that they make and grant Carnegie the
+ * rights to redistribute these changes.
+ */
+
+//#include <dev/isa/isavar.h>
+#include <dev/pci/pcivar.h>
+
+/*
+ * SB-1250 BR0 configuration.
+ *
+ * All of the information that the chipset-specific functions need to
+ * do their dirty work (and more!).
+ */
+struct sbbrz_softc {
+ device_t sc_dev;
+ struct mips_bus_space sc_iot, sc_memt;
+ struct mips_pci_chipset sc_pc;
+
+ struct mips_bus_dma_tag sc_dmat64;
+ bus_dma_tag_t sc_dmat32;
+
+ struct extent *sc_io_ex, *sc_mem_ex;
+};
+
+void sbbrz_pci_init(pci_chipset_tag_t, void *);
+
+void sbbrz_bus_io_init(bus_space_tag_t, void *);
+void sbbrz_bus_mem_init(bus_space_tag_t, void *);
Index: src/sys/arch/mips/sibyte/pci/sbpcihb.c
diff -u /dev/null src/sys/arch/mips/sibyte/pci/sbpcihb.c:1.2
--- /dev/null Thu Feb 17 14:24:12 2011
+++ src/sys/arch/mips/sibyte/pci/sbpcihb.c Thu Feb 17 14:24:12 2011
@@ -0,0 +1,89 @@
+/* $NetBSD: sbpcihb.c,v 1.2 2011/02/17 14:24:12 matt Exp $ */
+
+/*
+ * Copyright 2000, 2001
+ * Broadcom Corporation. All rights reserved.
+ *
+ * This software is furnished under license and may be used and copied only
+ * in accordance with the following terms and conditions. Subject to these
+ * conditions, you may download, copy, install, use, modify and distribute
+ * modified or unmodified copies of this software in source and/or binary
+ * form. No title or ownership is transferred hereby.
+ *
+ * 1) Any source code used, modified or distributed must reproduce and
+ * retain this copyright notice and list of conditions as they appear in
+ * the source file.
+ *
+ * 2) No right is granted to use any trade name, trademark, or logo of
+ * Broadcom Corporation. Neither the "Broadcom Corporation" name nor any
+ * trademark or logo of Broadcom Corporation may be used to endorse or
+ * promote products derived from this software without the prior written
+ * permission of Broadcom Corporation.
+ *
+ * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR
+ * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE
+ * FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE
+ * LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
+ * OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * Driver for SB-1250 PCI Host Bridge.
+ *
+ * Doesn't have to do much at all.
+ */
+
+#include <sys/param.h>
+#include <sys/device.h>
+#include <sys/systm.h>
+
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcivar.h>
+#include <dev/pci/ppbreg.h>
+#include <dev/pci/pcidevs.h>
+
+#include <machine/locore.h>
+#include <mips/sibyte/include/sb1250_regs.h>
+#include <mips/sibyte/include/sb1250_scd.h>
+
+static int sbpcihb_match(device_t, cfdata_t, void *);
+static void sbpcihb_attach(device_t, device_t, void *);
+
+CFATTACH_DECL_NEW(sbpcihb, 0,
+ sbpcihb_match, sbpcihb_attach, NULL, NULL);
+
+static int
+sbpcihb_match(device_t parent, cfdata_t match, void *aux)
+{
+ struct pci_attach_args *pa = aux;
+ int bus, device;
+
+ pci_decompose_tag(pa->pa_pc, pa->pa_tag, &bus, &device, NULL);
+
+ /* Check for a vendor/device match. */
+ if (bus == 0 && device == 0
+ && PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SIBYTE
+ && PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SIBYTE_BCM1250_PCIHB)
+ return 1;
+
+ return 0;
+}
+
+static void
+sbpcihb_attach(device_t parent, device_t self, void *aux)
+{
+ uint64_t regval;
+ bool host;
+
+ /* Tell the user whether it's host or device mode. */
+ regval = mips3_ld((void *)MIPS_PHYS_TO_KSEG0(A_SCD_SYSTEM_CFG));
+ host = (regval & M_SYS_PCI_HOST) != 0;
+
+ aprint_normal(": %s mode\n", host ? "host" : "device");
+}
