Module Name: src
Committed By: matt
Date: Sun Feb 20 16:58:33 UTC 2011
Modified Files:
src/sys/arch/mips/mips: locore.S
Log Message:
Make sure to pass cause as the 3rd arg to mips_emul_fp
To generate a diff of this commit:
cvs rdiff -u -r1.176 -r1.177 src/sys/arch/mips/mips/locore.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/locore.S
diff -u src/sys/arch/mips/mips/locore.S:1.176 src/sys/arch/mips/mips/locore.S:1.177
--- src/sys/arch/mips/mips/locore.S:1.176 Sun Feb 20 07:45:47 2011
+++ src/sys/arch/mips/mips/locore.S Sun Feb 20 16:58:33 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.176 2011/02/20 07:45:47 matt Exp $ */
+/* $NetBSD: locore.S,v 1.177 2011/02/20 16:58:33 matt Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -610,7 +610,7 @@
COP0_HAZARD_FPUENABLE
REG_PROLOGUE
- REG_L t3, TF_REG_CAUSE(a1)
+ REG_L a2, TF_REG_CAUSE(a1)
REG_EPILOGUE
cfc1 t0, MIPS_FPU_CSR # stall til FP done
@@ -629,13 +629,11 @@
*
* fetch the instruction and emulate the instruction.
*/
- bgez t3, 1f # Check the branch delay bit.
+ bgez a2, 1f # Check the branch delay bit.
nop
/*
* The instruction is in the branch delay slot.
*/
- move a2, a0 # 3rd arg is opcode address
-
b 2f
INT_L a0, 4(a0) # a0 = coproc instruction
/*
