Module Name: src
Committed By: phx
Date: Sun Mar 27 19:09:43 UTC 2011
Modified Files:
src/sys/arch/sandpoint/stand/altboot: rge.c
Log Message:
Fixed PHY access.
Support 8169SC/8110SC (as found on QNAP V200 boards).
Make frame receiving work (FRAMELEN <-> FRAMESIZE).
Driver works now, but not the first time after cold start.
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/sandpoint/stand/altboot/rge.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/sandpoint/stand/altboot/rge.c
diff -u src/sys/arch/sandpoint/stand/altboot/rge.c:1.2 src/sys/arch/sandpoint/stand/altboot/rge.c:1.3
--- src/sys/arch/sandpoint/stand/altboot/rge.c:1.2 Thu Jan 27 17:38:04 2011
+++ src/sys/arch/sandpoint/stand/altboot/rge.c Sun Mar 27 19:09:43 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: rge.c,v 1.2 2011/01/27 17:38:04 phx Exp $ */
+/* $NetBSD: rge.c,v 1.3 2011/03/27 19:09:43 phx Exp $ */
/*-
* Copyright (c) 2007 The NetBSD Foundation, Inc.
@@ -133,6 +133,7 @@
v = pcicfgread(tag, PCI_ID_REG);
switch (v) {
+ case PCI_DEVICE(0x10ec, 0x8167):
case PCI_DEVICE(0x10ec, 0x8169):
return 1;
}
@@ -199,7 +200,7 @@
l->rcr = (07 << 13) | (07 << 8) | RCR_APM;
CSR_WRITE_1(l, RGE_CR, CR_TXEN | CR_RXEN);
CSR_WRITE_1(l, RGE_ETTHR, 0x3f);
- CSR_WRITE_2(l, RGE_RMS, FRAMELEN);
+ CSR_WRITE_2(l, RGE_RMS, FRAMESIZE);
CSR_WRITE_4(l, RGE_TCR, l->tcr);
CSR_WRITE_4(l, RGE_RCR, l->rcr);
CSR_WRITE_4(l, RGE_TNPDS, VTOPHYS(txd));
@@ -208,7 +209,6 @@
CSR_WRITE_4(l, RGE_RDSAR + 4, 0);
CSR_WRITE_2(l, RGE_ISR, ~0);
CSR_WRITE_2(l, RGE_IMR, 0);
-
return l;
}
@@ -287,15 +287,16 @@
static int
mii_read(struct local *l, int phy, int reg)
{
- unsigned v, loop;
+ unsigned v;
v = reg << 16;
CSR_WRITE_4(l, RGE_PHYAR, v);
- loop = 100;
+ DELAY(1000);
do {
+ DELAY(100);
v = CSR_READ_4(l, RGE_PHYAR);
} while ((v & (1U << 31)) == 0); /* wait for 0 -> 1 */
- return v;
+ return v & 0xffff;
}
static void
@@ -305,7 +306,9 @@
v = (reg << 16) | (data & 0xffff) | (1U << 31);
CSR_WRITE_4(l, RGE_PHYAR, v);
+ DELAY(1000);
do {
+ DELAY(100);
v = CSR_READ_4(l, RGE_PHYAR);
} while (v & (1U << 31)); /* wait for 1 -> 0 */
}
@@ -337,17 +340,9 @@
static void
mii_initphy(struct local *l)
{
- int phy, ctl, sts, bound;
+ int bound, ctl, phy, sts;
- for (phy = 0; phy < 32; phy++) {
- ctl = mii_read(l, phy, MII_BMCR);
- sts = mii_read(l, phy, MII_BMSR);
- if (ctl != 0xffff && sts != 0xffff)
- goto found;
- }
- printf("MII: no PHY found\n");
- return;
- found:
+ phy = 7; /* internal rgephy, always at 7 */
ctl = mii_read(l, phy, MII_BMCR);
mii_write(l, phy, MII_BMCR, ctl | BMCR_RESET);
bound = 100;
