CVS commit: src/sys/arch/mips/mips

[Cliff Neighbors]

Module Name:    src
Committed By:   cliff
Date:           Thu Apr 14 05:10:04 UTC 2011

Modified Files:
        src/sys/arch/mips/mips: mips_machdep.c

Log Message:
- add mips_watchpoint_init() to discover number of CPU watchpoints,
and call that from {mips32,mips32r2,mips64,mips64r2}_vector_init()


To generate a diff of this commit:
cvs rdiff -u -r1.238 -r1.239 src/sys/arch/mips/mips/mips_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.


Modified files:

Index: src/sys/arch/mips/mips/mips_machdep.c
diff -u src/sys/arch/mips/mips/mips_machdep.c:1.238 src/sys/arch/mips/mips/mips_machdep.c:1.239
--- src/sys/arch/mips/mips/mips_machdep.c:1.238	Wed Apr  6 05:50:39 2011
+++ src/sys/arch/mips/mips/mips_machdep.c	Thu Apr 14 05:10:04 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: mips_machdep.c,v 1.238 2011/04/06 05:50:39 matt Exp $	*/
+/*	$NetBSD: mips_machdep.c,v 1.239 2011/04/14 05:10:04 cliff Exp $	*/
 
 /*
  * Copyright 2002 Wasabi Systems, Inc.
@@ -112,7 +112,7 @@
 
 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
 
-__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.238 2011/04/06 05:50:39 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.239 2011/04/14 05:10:04 cliff Exp $");
 
 #define __INTR_PRIVATE
 #include "opt_cputype.h"
@@ -188,6 +188,10 @@
 u_long	cpu_dump_mempagecnt(void);
 int	cpu_dump(void);
 
+#if (MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) > 0
+static void mips_watchpoint_init(void);
+#endif
+
 #if defined(MIPS3_PLUS)
 uint32_t mips3_cp0_tlb_page_mask_probe(void);
 uint64_t mips3_cp0_tlb_entry_hi_probe(void);
@@ -784,6 +788,8 @@
 
 	/* Clear BEV in SR so we start handling our own exceptions */
 	mips_cp0_status_write(mips_cp0_status_read() & ~MIPS_SR_BEV);
+
+	mips_watchpoint_init();
 }
 #endif /* MIPS32 */
 
@@ -849,6 +855,8 @@
 
 	/* Clear BEV in SR so we start handling our own exceptions */
 	mips_cp0_status_write(mips_cp0_status_read() & ~MIPS_SR_BEV);
+
+	mips_watchpoint_init();
 }
 #endif /* MIPS32R2 */
 
@@ -902,6 +910,8 @@
 
 	/* Clear BEV in SR so we start handling our own exceptions */
 	mips_cp0_status_write(mips_cp0_status_read() & ~MIPS_SR_BEV);
+
+	mips_watchpoint_init();
 }
 #endif /* MIPS64 */
 
@@ -972,6 +982,8 @@
 
 	/* Clear BEV in SR so we start handling our own exceptions */
 	mips_cp0_status_write(mips_cp0_status_read() & ~MIPS_SR_BEV);
+
+	mips_watchpoint_init();
 }
 #endif /* MIPS64R2 */
 
@@ -2196,3 +2208,14 @@
 	KASSERT(ci->ci_cpl == IPL_NONE);
 }
 #endif /* PARANOIA */
+
+#if (MIPS32 + MIPS32R2 + MIPS64 + MIPS64R2) > 0
+static void
+mips_watchpoint_init(void)
+{
+	/*
+	 * determine number of CPU watchpoints
+	 */
+	curcpu()->ci_cpuwatch_count = cpuwatch_discover();
+}
+#endif