Module Name:    src
Committed By:   bouyer
Date:           Thu May 19 19:34:14 UTC 2011

Modified Files:
        src/sys/dev/pci [netbsd-5]: agp.c agp_via.c
        src/sys/sys [netbsd-5]: agpio.h

Log Message:
Pull up following revision(s) (requested by jmcneill in ticket #1560):
        sys/sys/agpio.h: revision 1.10
        sys/dev/pci/agp_via.c: revision 1.21
        sys/dev/pci/agp.c: revision 1.77
add AGP v3 support to agp_generic_enable from FreeBSD


To generate a diff of this commit:
cvs rdiff -u -r1.62.4.1 -r1.62.4.2 src/sys/dev/pci/agp.c
cvs rdiff -u -r1.17.8.1 -r1.17.8.2 src/sys/dev/pci/agp_via.c
cvs rdiff -u -r1.5 -r1.5.86.1 src/sys/sys/agpio.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/dev/pci/agp.c
diff -u src/sys/dev/pci/agp.c:1.62.4.1 src/sys/dev/pci/agp.c:1.62.4.2
--- src/sys/dev/pci/agp.c:1.62.4.1	Tue May  5 18:17:57 2009
+++ src/sys/dev/pci/agp.c	Thu May 19 19:34:14 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: agp.c,v 1.62.4.1 2009/05/05 18:17:57 bouyer Exp $	*/
+/*	$NetBSD: agp.c,v 1.62.4.2 2011/05/19 19:34:14 bouyer Exp $	*/
 
 /*-
  * Copyright (c) 2000 Doug Rabson
@@ -65,7 +65,7 @@
 
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: agp.c,v 1.62.4.1 2009/05/05 18:17:57 bouyer Exp $");
+__KERNEL_RCSID(0, "$NetBSD: agp.c,v 1.62.4.2 2011/05/19 19:34:14 bouyer Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -102,6 +102,10 @@
 static int agp_deallocate_user(struct agp_softc *, int);
 static int agp_bind_user(struct agp_softc *, agp_bind *);
 static int agp_unbind_user(struct agp_softc *, agp_unbind *);
+static int agp_generic_enable_v2(struct agp_softc *, struct pci_attach_args *,
+				 int, u_int32_t);
+static int agp_generic_enable_v3(struct agp_softc *, struct pci_attach_args *,
+				 int, u_int32_t);
 static int agpdev_match(struct pci_attach_args *);
 static bool agp_resume(device_t PMF_FN_PROTO);
 
@@ -442,8 +446,7 @@
 {
 	struct pci_attach_args pa;
 	pcireg_t tstatus, mstatus;
-	pcireg_t command;
-	int rq, sba, fw, rate, capoff;
+	int capoff;
 
 	if (pci_find_device(&pa, agpdev_match) == 0 ||
 	    pci_get_capability(pa.pa_pc, pa.pa_tag, PCI_CAP_AGP,
@@ -457,6 +460,27 @@
 	mstatus = pci_conf_read(pa.pa_pc, pa.pa_tag,
 	    capoff + AGP_STATUS);
 
+	if (AGP_MODE_GET_MODE_3(mode) &&
+	    AGP_MODE_GET_MODE_3(tstatus) &&
+	    AGP_MODE_GET_MODE_3(mstatus))
+		return agp_generic_enable_v3(sc, &pa, capoff, mode);
+	else
+		return agp_generic_enable_v2(sc, &pa, capoff, mode);
+}
+
+static int
+agp_generic_enable_v2(struct agp_softc *sc, struct pci_attach_args *pa,
+    int capoff, u_int32_t mode)
+{
+	pcireg_t tstatus, mstatus;
+	pcireg_t command;
+	int rq, sba, fw, rate;
+
+	tstatus = pci_conf_read(sc->as_pc, sc->as_tag,
+	    sc->as_capoff + AGP_STATUS);
+	mstatus = pci_conf_read(pa->pa_pc, pa->pa_tag,
+	    capoff + AGP_STATUS);
+
 	/* Set RQ to the min of mode, tstatus and mstatus */
 	rq = AGP_MODE_GET_RQ(mode);
 	if (AGP_MODE_GET_RQ(tstatus) < rq)
@@ -478,22 +502,89 @@
 	rate = (AGP_MODE_GET_RATE(tstatus)
 		& AGP_MODE_GET_RATE(mstatus)
 		& AGP_MODE_GET_RATE(mode));
-	if (rate & AGP_MODE_RATE_4x)
-		rate = AGP_MODE_RATE_4x;
-	else if (rate & AGP_MODE_RATE_2x)
-		rate = AGP_MODE_RATE_2x;
+	if (rate & AGP_MODE_V2_RATE_4x)
+		rate = AGP_MODE_V2_RATE_4x;
+	else if (rate & AGP_MODE_V2_RATE_2x)
+		rate = AGP_MODE_V2_RATE_2x;
+	else
+		rate = AGP_MODE_V2_RATE_1x;
+
+	/* Construct the new mode word and tell the hardware */
+	command = AGP_MODE_SET_RQ(0, rq);
+	command = AGP_MODE_SET_SBA(command, sba);
+	command = AGP_MODE_SET_FW(command, fw);
+	command = AGP_MODE_SET_RATE(command, rate);
+	command = AGP_MODE_SET_AGP(command, 1);
+	pci_conf_write(sc->as_pc, sc->as_tag,
+	    sc->as_capoff + AGP_COMMAND, command);
+	pci_conf_write(pa->pa_pc, pa->pa_tag, capoff + AGP_COMMAND, command);
+
+	return 0;
+}
+
+static int
+agp_generic_enable_v3(struct agp_softc *sc, struct pci_attach_args *pa,
+    int capoff, u_int32_t mode)
+{
+	pcireg_t tstatus, mstatus;
+	pcireg_t command;
+	int rq, sba, fw, rate, arqsz, cal;
+
+	tstatus = pci_conf_read(sc->as_pc, sc->as_tag,
+	    sc->as_capoff + AGP_STATUS);
+	mstatus = pci_conf_read(pa->pa_pc, pa->pa_tag,
+	    capoff + AGP_STATUS);
+
+	/* Set RQ to the min of mode, tstatus and mstatus */
+	rq = AGP_MODE_GET_RQ(mode);
+	if (AGP_MODE_GET_RQ(tstatus) < rq)
+		rq = AGP_MODE_GET_RQ(tstatus);
+	if (AGP_MODE_GET_RQ(mstatus) < rq)
+		rq = AGP_MODE_GET_RQ(mstatus);
+
+	/*
+	 * ARQSZ - Set the value to the maximum one.
+	 * Don't allow the mode register to override values.
+	 */
+	arqsz = AGP_MODE_GET_ARQSZ(mode);
+	if (AGP_MODE_GET_ARQSZ(tstatus) > arqsz)
+		arqsz = AGP_MODE_GET_ARQSZ(tstatus);
+	if (AGP_MODE_GET_ARQSZ(mstatus) > arqsz)
+		arqsz = AGP_MODE_GET_ARQSZ(mstatus);
+
+	/* Calibration cycle - don't allow override by mode register */
+	cal = AGP_MODE_GET_CAL(tstatus);
+	if (AGP_MODE_GET_CAL(mstatus) < cal)
+		cal = AGP_MODE_GET_CAL(mstatus);
+
+	/* SBA must be supported for AGP v3. */
+	sba = 1;
+
+	/* Set FW if all three support it. */
+	fw = (AGP_MODE_GET_FW(tstatus)
+	       & AGP_MODE_GET_FW(mstatus)
+	       & AGP_MODE_GET_FW(mode));
+
+	/* Figure out the max rate */
+	rate = (AGP_MODE_GET_RATE(tstatus)
+		& AGP_MODE_GET_RATE(mstatus)
+		& AGP_MODE_GET_RATE(mode));
+	if (rate & AGP_MODE_V3_RATE_8x)
+		rate = AGP_MODE_V3_RATE_8x;
 	else
-		rate = AGP_MODE_RATE_1x;
+		rate = AGP_MODE_V3_RATE_4x;
 
 	/* Construct the new mode word and tell the hardware */
 	command = AGP_MODE_SET_RQ(0, rq);
+	command = AGP_MODE_SET_ARQSZ(command, arqsz);
+	command = AGP_MODE_SET_CAL(command, cal);
 	command = AGP_MODE_SET_SBA(command, sba);
 	command = AGP_MODE_SET_FW(command, fw);
 	command = AGP_MODE_SET_RATE(command, rate);
 	command = AGP_MODE_SET_AGP(command, 1);
 	pci_conf_write(sc->as_pc, sc->as_tag,
 	    sc->as_capoff + AGP_COMMAND, command);
-	pci_conf_write(pa.pa_pc, pa.pa_tag, capoff + AGP_COMMAND, command);
+	pci_conf_write(pa->pa_pc, pa->pa_tag, capoff + AGP_COMMAND, command);
 
 	return 0;
 }

Index: src/sys/dev/pci/agp_via.c
diff -u src/sys/dev/pci/agp_via.c:1.17.8.1 src/sys/dev/pci/agp_via.c:1.17.8.2
--- src/sys/dev/pci/agp_via.c:1.17.8.1	Sun Feb 14 13:35:44 2010
+++ src/sys/dev/pci/agp_via.c	Thu May 19 19:34:14 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: agp_via.c,v 1.17.8.1 2010/02/14 13:35:44 bouyer Exp $	*/
+/*	$NetBSD: agp_via.c,v 1.17.8.2 2011/05/19 19:34:14 bouyer Exp $	*/
 
 /*-
  * Copyright (c) 2000 Doug Rabson
@@ -29,7 +29,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: agp_via.c,v 1.17.8.1 2010/02/14 13:35:44 bouyer Exp $");
+__KERNEL_RCSID(0, "$NetBSD: agp_via.c,v 1.17.8.2 2011/05/19 19:34:14 bouyer Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -156,7 +156,7 @@
 				 gatt->ag_physical);
 		/* Enable the aperture. */
 		gartctrl = pci_conf_read(pa->pa_pc, pa->pa_tag,
-				 asc->regs[REG_ATTBASE]);
+				 asc->regs[REG_GARTCTRL]);
 		pci_conf_write(pa->pa_pc, pa->pa_tag, asc->regs[REG_GARTCTRL],
 				 gartctrl | (3 << 7));
 	}
@@ -190,41 +190,118 @@
 	struct agp_via_softc *asc = sc->as_chipc;
 	u_int32_t apsize;
 
-	apsize = pci_conf_read(sc->as_pc, sc->as_tag, asc->regs[REG_APSIZE])
-				& 0x1f;
+	if (asc->regs == via_v2_regs) {
+		apsize = pci_conf_read(sc->as_pc, sc->as_tag,
+				asc->regs[REG_APSIZE]) & 0xff;
 
-	/*
-	 * The size is determined by the number of low bits of
-	 * register APBASE which are forced to zero. The low 20 bits
-	 * are always forced to zero and each zero bit in the apsize
-	 * field just read forces the corresponding bit in the 27:20
-	 * to be zero. We calculate the aperture size accordingly.
-	 */
-	return (((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1;
+		/*
+		 * The size is determined by the number of low bits of
+		 * register APBASE which are forced to zero. The low 20 bits
+		 * are always forced to zero and each zero bit in the apsize
+		 * field just read forces the corresponding bit in the 27:20
+		 * to be zero. We calculate the aperture size accordingly.
+		 */
+		return (((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1;
+	} else {
+		apsize = pci_conf_read(sc->as_pc, sc->as_tag,
+				asc->regs[REG_APSIZE]) & 0xfff;
+		switch (apsize) {
+		case 0x800:
+			return 0x80000000;
+		case 0xc00:
+			return 0x40000000;
+		case 0xe00:
+			return 0x20000000;
+		case 0xf00:
+			return 0x10000000;
+		case 0xf20:
+			return 0x08000000;
+		case 0xf30:
+			return 0x04000000;
+		case 0xf38:
+			return 0x02000000;
+		case 0xf3c:
+			return 0x01000000;
+		case 0xf3e:
+			return 0x00800000;
+		case 0xf3f:
+			return 0x00400000;
+		default:
+			aprint_error_dev(sc->as_dev,
+			    "invalid aperture setting 0x%x\n", apsize);
+			return 0;
+		}
+	}
 }
 
 static int
 agp_via_set_aperture(struct agp_softc *sc, u_int32_t aperture)
 {
 	struct agp_via_softc *asc = sc->as_chipc;
-	u_int32_t apsize;
+	u_int32_t apsize, key;
 	pcireg_t reg;
 
-	/*
-	 * Reverse the magic from get_aperture.
-	 */
-	apsize = ((aperture - 1) >> 20) ^ 0xff;
-
-	/*
-	 * Double check for sanity.
-	 */
-	if ((((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1 != aperture)
-		return EINVAL;
+	if (asc->regs == via_v2_regs) {
+		/*
+		 * Reverse the magic from get_aperture.
+		 */
+		apsize = ((aperture - 1) >> 20) ^ 0xff;
+
+		/*
+		 * Double check for sanity.
+		 */
+		if ((((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1 != aperture)
+			return EINVAL;
 
-	reg = pci_conf_read(sc->as_pc, sc->as_tag, asc->regs[REG_APSIZE]);
-	reg &= ~0xff;
-	reg |= apsize;
-	pci_conf_write(sc->as_pc, sc->as_tag, asc->regs[REG_APSIZE], reg);
+		reg = pci_conf_read(sc->as_pc, sc->as_tag,
+		    asc->regs[REG_APSIZE]);
+		reg &= ~0xff;
+		reg |= apsize;
+		pci_conf_write(sc->as_pc, sc->as_tag,
+		    asc->regs[REG_APSIZE], reg);
+	} else {
+		switch (aperture) {
+		case 0x80000000:
+			key = 0x800;
+			break;
+		case 0x40000000:
+			key = 0xc00;
+			break;
+		case 0x20000000:
+			key = 0xe00;
+			break;
+		case 0x10000000:
+			key = 0xf00;
+			break;
+		case 0x08000000:
+			key = 0xf20;
+			break;
+		case 0x04000000:
+			key = 0xf30;
+			break;
+		case 0x02000000:
+			key = 0xf38;
+			break;
+		case 0x01000000:
+			key = 0xf3c;
+			break;
+		case 0x00800000:
+			key = 0xf3e;
+			break;
+		case 0x00400000:
+			key = 0xf3f;
+			break;
+		default:
+			aprint_error_dev(sc->as_dev,
+			    "invalid aperture size (%dMB)\n",
+			    aperture / 1024 / 1024);
+			return EINVAL;
+		}
+		reg = pci_conf_read(sc->as_pc, sc->as_tag, asc->regs[REG_APSIZE]);
+		reg &= ~0xfff;
+		reg |= key;
+		pci_conf_write(sc->as_pc, sc->as_tag, asc->regs[REG_APSIZE], reg);
+	}
 
 	return 0;
 }

Index: src/sys/sys/agpio.h
diff -u src/sys/sys/agpio.h:1.5 src/sys/sys/agpio.h:1.5.86.1
--- src/sys/sys/agpio.h:1.5	Mon Dec 26 18:41:36 2005
+++ src/sys/sys/agpio.h	Thu May 19 19:34:13 2011
@@ -1,4 +1,4 @@
-/*	$NetBSD: agpio.h,v 1.5 2005/12/26 18:41:36 perry Exp $	*/
+/*	$NetBSD: agpio.h,v 1.5.86.1 2011/05/19 19:34:13 bouyer Exp $	*/
 
 /*-
  * Copyright (c) 2000 Doug Rabson
@@ -41,20 +41,34 @@
  * Macros to manipulate AGP mode words.
  */
 #define AGP_MODE_GET_RQ(x)		(((x) & 0xff000000U) >> 24)
+#define AGP_MODE_GET_ARQSZ(x)		(((x) & 0x0000e000U) >> 13)
+#define AGP_MODE_GET_CAL(x)		(((x) & 0x00001c00U) >> 10)
 #define AGP_MODE_GET_SBA(x)		(((x) & 0x00000200U) >> 9)
 #define AGP_MODE_GET_AGP(x)		(((x) & 0x00000100U) >> 8)
 #define AGP_MODE_GET_4G(x)		(((x) & 0x00000020U) >> 5)
 #define AGP_MODE_GET_FW(x)		(((x) & 0x00000010U) >> 4)
+#define AGP_MODE_GET_MODE_3(x)		(((x) & 0x00000008U) >> 3)
 #define AGP_MODE_GET_RATE(x)		((x) & 0x00000007U)
 #define AGP_MODE_SET_RQ(x,v)		(((x) & ~0xff000000U) | ((v) << 24))
+#define AGP_MODE_SET_ARQSZ(x,v)		(((x) & ~0x0000e000U) | ((v) << 13))
+#define AGP_MODE_SET_CAL(x,v)		(((x) & ~0x00001c00U) | ((v) << 10))
 #define AGP_MODE_SET_SBA(x,v)		(((x) & ~0x00000200U) | ((v) << 9))
 #define AGP_MODE_SET_AGP(x,v)		(((x) & ~0x00000100U) | ((v) << 8))
 #define AGP_MODE_SET_4G(x,v)		(((x) & ~0x00000020U) | ((v) << 5))
 #define AGP_MODE_SET_FW(x,v)		(((x) & ~0x00000010U) | ((v) << 4))
+#define AGP_MODE_SET_MODE_3(x,v)	(((x) & ~0x00000008U) | ((v) << 3))
 #define AGP_MODE_SET_RATE(x,v)		(((x) & ~0x00000007U) | (v))
-#define AGP_MODE_RATE_1x		0x00000001
-#define AGP_MODE_RATE_2x		0x00000002
-#define AGP_MODE_RATE_4x		0x00000004
+#define AGP_MODE_V2_RATE_1x		0x00000001
+#define AGP_MODE_V2_RATE_2x		0x00000002
+#define AGP_MODE_V2_RATE_4x		0x00000004
+#define AGP_MODE_V3_RATE_4x		0x00000001
+#define AGP_MODE_V3_RATE_8x		0x00000002
+#define AGP_MODE_V3_RATE_RSVD		0x00000004
+
+/* compat */
+#define AGP_MODE_RATE_1x		AGP_MODE_V2_RATE_1x
+#define AGP_MODE_RATE_2x		AGP_MODE_V2_RATE_2x
+#define AGP_MODE_RATE_4x		AGP_MODE_V2_RATE_4x
 
 #define AGPIOC_BASE       'A'
 #define AGPIOC_INFO       _IOR (AGPIOC_BASE, 0, agp_info)

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