Module Name: src
Committed By: matt
Date: Fri May 20 14:42:20 UTC 2011
Modified Files:
src/sys/dev/mii [matt-nb5-mips64]: miidevs.h miidevs_data.h
Log Message:
Regen.
To generate a diff of this commit:
cvs rdiff -u -r1.81.10.2 -r1.81.10.3 src/sys/dev/mii/miidevs.h
cvs rdiff -u -r1.71.10.2 -r1.71.10.3 src/sys/dev/mii/miidevs_data.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/mii/miidevs.h
diff -u src/sys/dev/mii/miidevs.h:1.81.10.2 src/sys/dev/mii/miidevs.h:1.81.10.3
--- src/sys/dev/mii/miidevs.h:1.81.10.2 Wed Apr 21 00:27:39 2010
+++ src/sys/dev/mii/miidevs.h Fri May 20 14:42:20 2011
@@ -1,10 +1,10 @@
-/* $NetBSD: miidevs.h,v 1.81.10.2 2010/04/21 00:27:39 matt Exp $ */
+/* $NetBSD: miidevs.h,v 1.81.10.3 2011/05/20 14:42:20 matt Exp $ */
/*
* THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
*
* generated from:
- * NetBSD: miidevs,v 1.78.10.2 2010/04/20 22:55:48 matt Exp
+ * NetBSD: miidevs,v 1.78.10.5 2011/05/20 14:41:01 matt Exp
*/
/*-
@@ -125,6 +125,8 @@
#define MII_STR_ATTANSIC_L1 "L1 10/100/1000 PHY"
#define MII_MODEL_ATTANSIC_L2 0x0002
#define MII_STR_ATTANSIC_L2 "L2 10/100 PHY"
+#define MII_MODEL_ATTANSIC_AR8316 0x0004
+#define MII_STR_ATTANSIC_AR8316 "AR8316 Switch"
/* Altima Communications PHYs */
/* Don't know the model for ACXXX */
Index: src/sys/dev/mii/miidevs_data.h
diff -u src/sys/dev/mii/miidevs_data.h:1.71.10.2 src/sys/dev/mii/miidevs_data.h:1.71.10.3
--- src/sys/dev/mii/miidevs_data.h:1.71.10.2 Wed Apr 21 00:27:39 2010
+++ src/sys/dev/mii/miidevs_data.h Fri May 20 14:42:20 2011
@@ -1,10 +1,10 @@
-/* $NetBSD: miidevs_data.h,v 1.71.10.2 2010/04/21 00:27:39 matt Exp $ */
+/* $NetBSD: miidevs_data.h,v 1.71.10.3 2011/05/20 14:42:20 matt Exp $ */
/*
* THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
*
* generated from:
- * NetBSD: miidevs,v 1.78.10.2 2010/04/20 22:55:48 matt Exp
+ * NetBSD: miidevs,v 1.78.10.5 2011/05/20 14:41:01 matt Exp
*/
/*-
@@ -41,6 +41,7 @@
{ MII_OUI_ATHEROS, MII_MODEL_ATHEROS_F2, MII_STR_ATHEROS_F2 },
{ MII_OUI_ATTANSIC, MII_MODEL_ATTANSIC_L1, MII_STR_ATTANSIC_L1 },
{ MII_OUI_ATTANSIC, MII_MODEL_ATTANSIC_L2, MII_STR_ATTANSIC_L2 },
+ { MII_OUI_ATTANSIC, MII_MODEL_ATTANSIC_AR8316, MII_STR_ATTANSIC_AR8316 },
{ MII_OUI_ALTIMA, MII_MODEL_ALTIMA_ACXXX, MII_STR_ALTIMA_ACXXX },
{ MII_OUI_ALTIMA, MII_MODEL_ALTIMA_AC101, MII_STR_ALTIMA_AC101 },
{ MII_OUI_ALTIMA, MII_MODEL_ALTIMA_AC101L, MII_STR_ALTIMA_AC101L },
