Module Name: src
Committed By: mrg
Date: Mon Jun 6 01:16:49 UTC 2011
Modified Files:
src/sys/arch/sparc64/conf: files.sparc64
src/sys/arch/sparc64/sparc64: cache.h ipifuncs.c pmap.c
Added Files:
src/sys/arch/sparc64/sparc64: cache.c
Log Message:
re-implement blast_dcache() and blast_icache() via function pointers so that
we can set these to functions that simply return on sun4us/sun4v systems.
also include some work-in-progress #if 0'ed code to do the same for the
dcache_flush*() functions.
(some of these could probably move into the cpuinfo except that sparc64
systems don't really ever work with mismatches AFAICT.)
To generate a diff of this commit:
cvs rdiff -u -r1.130 -r1.131 src/sys/arch/sparc64/conf/files.sparc64
cvs rdiff -u -r0 -r1.7 src/sys/arch/sparc64/sparc64/cache.c
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/sparc64/sparc64/cache.h
cvs rdiff -u -r1.40 -r1.41 src/sys/arch/sparc64/sparc64/ipifuncs.c
cvs rdiff -u -r1.271 -r1.272 src/sys/arch/sparc64/sparc64/pmap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/sparc64/conf/files.sparc64
diff -u src/sys/arch/sparc64/conf/files.sparc64:1.130 src/sys/arch/sparc64/conf/files.sparc64:1.131
--- src/sys/arch/sparc64/conf/files.sparc64:1.130 Sat Apr 9 19:31:14 2011
+++ src/sys/arch/sparc64/conf/files.sparc64 Mon Jun 6 01:16:48 2011
@@ -1,4 +1,4 @@
-# $NetBSD: files.sparc64,v 1.130 2011/04/09 19:31:14 jdc Exp $
+# $NetBSD: files.sparc64,v 1.131 2011/06/06 01:16:48 mrg Exp $
# @(#)files.sparc64 8.1 (Berkeley) 7/19/93
# sparc64-specific configuration info
@@ -206,6 +206,7 @@
file arch/sparc/sparc/promlib.c
file arch/sparc64/sparc64/autoconf.c
file arch/sparc64/sparc64/clock.c
+file arch/sparc64/sparc64/cache.c
file arch/sparc64/sparc64/core_machdep.c coredump
file arch/sparc64/sparc64/emul.c
file arch/sparc64/sparc64/intr.c
Index: src/sys/arch/sparc64/sparc64/cache.h
diff -u src/sys/arch/sparc64/sparc64/cache.h:1.20 src/sys/arch/sparc64/sparc64/cache.h:1.21
--- src/sys/arch/sparc64/sparc64/cache.h:1.20 Wed May 25 12:01:31 2011
+++ src/sys/arch/sparc64/sparc64/cache.h Mon Jun 6 01:16:48 2011
@@ -1,14 +1,8 @@
-/* $NetBSD: cache.h,v 1.20 2011/05/25 12:01:31 mrg Exp $ */
+/* $NetBSD: cache.h,v 1.21 2011/06/06 01:16:48 mrg Exp $ */
/*
- * Copyright (c) 1996
- * The President and Fellows of Harvard College. All rights reserved.
- * Copyright (c) 1992, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * This software was developed by the Computer Systems Engineering group
- * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
- * contributed to Berkeley.
+ * Copyright (c) 2011 Matthew R. Green
+ * All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@@ -18,20 +12,36 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- * must display the following acknowledgement:
- * This product includes software developed by Aaron Brown and
- * Harvard University.
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
- * 4. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
*
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * Copyright (C) 1996-1999 Eduardo Horvath.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
@@ -40,7 +50,6 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * @(#)cache.h 8.1 (Berkeley) 6/11/93
*/
/*
@@ -112,17 +121,6 @@
cache_flush_phys_us(pa, size, ecache);
}
-static __inline__ void
-blast_icache(void)
-{
- if (CPU_ISSUN4US || CPU_ISSUN4V)
- return;
- if (CPU_IS_USIII_UP())
- blast_icache_usiii();
- else
- blast_icache_us();
-}
-
/* SPARC64 specific */
/* Assembly routines to flush TLB mappings */
void sp_tlb_flush_pte_us(vaddr_t, int);
@@ -148,24 +146,25 @@
sp_tlb_flush_all_us();
}
+#if 0
+extern void (*dcache_flush_page)(paddr_t);
+extern void (*dcache_flush_page_cpuset)(paddr_t, sparc64_cpuset_t);
+#endif
+extern void (*blast_dcache)(void);
+extern void (*blast_icache)(void);
+
+void cache_setup_funcs(void);
+
#ifdef MULTIPROCESSOR
void smp_tlb_flush_pte(vaddr_t, struct pmap *);
void smp_dcache_flush_page_cpuset(paddr_t pa, sparc64_cpuset_t);
-void smp_blast_dcache(sparc64_cpuset_t);
+void smp_blast_dcache(void);
#define tlb_flush_pte(va,pm ) smp_tlb_flush_pte(va, pm)
#define dcache_flush_page_all(pa) smp_dcache_flush_page_cpuset(pa, cpus_active)
#define dcache_flush_page_cpuset(pa,cs) smp_dcache_flush_page_cpuset(pa, cs)
-#define blast_dcache() smp_blast_dcache(cpus_active)
#else
#define tlb_flush_pte(va,pm) sp_tlb_flush_pte(va, (pm)->pm_ctx[0])
#define dcache_flush_page_all(pa) dcache_flush_page(pa)
#define dcache_flush_page_cpuset(pa,cs) dcache_flush_page(pa)
-static __inline__ void
-blast_dcache(void)
-{
- if (CPU_ISSUN4US || CPU_ISSUN4V)
- return;
- sp_blast_dcache(dcache_size, dcache_line_size);
-}
#endif
Index: src/sys/arch/sparc64/sparc64/ipifuncs.c
diff -u src/sys/arch/sparc64/sparc64/ipifuncs.c:1.40 src/sys/arch/sparc64/sparc64/ipifuncs.c:1.41
--- src/sys/arch/sparc64/sparc64/ipifuncs.c:1.40 Thu May 12 05:43:40 2011
+++ src/sys/arch/sparc64/sparc64/ipifuncs.c Mon Jun 6 01:16:48 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: ipifuncs.c,v 1.40 2011/05/12 05:43:40 mrg Exp $ */
+/* $NetBSD: ipifuncs.c,v 1.41 2011/06/06 01:16:48 mrg Exp $ */
/*-
* Copyright (c) 2004 The NetBSD Foundation, Inc.
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ipifuncs.c,v 1.40 2011/05/12 05:43:40 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ipifuncs.c,v 1.41 2011/06/06 01:16:48 mrg Exp $");
#include "opt_ddb.h"
@@ -434,17 +434,26 @@
dcache_flush_page(pa);
}
+#if 0
+void
+smp_dcache_flush_page_allcpu(paddr_t pa)
+{
+
+ smp_dcache_flush_page_cpuset(pa, cpus_active);
+}
+#endif
+
/*
- * Flush the D$ on this set of CPUs.
+ * Flush the D$ on all CPUs.
*/
void
-smp_blast_dcache(sparc64_cpuset_t activecpus)
+smp_blast_dcache(void)
{
if (CPU_ISSUN4US || CPU_ISSUN4V)
return;
- sparc64_multicast_ipi(activecpus, sparc64_ipi_blast_dcache,
+ sparc64_multicast_ipi(cpus_active, sparc64_ipi_blast_dcache,
dcache_size, dcache_line_size);
sp_blast_dcache(dcache_size, dcache_line_size);
}
Index: src/sys/arch/sparc64/sparc64/pmap.c
diff -u src/sys/arch/sparc64/sparc64/pmap.c:1.271 src/sys/arch/sparc64/sparc64/pmap.c:1.272
--- src/sys/arch/sparc64/sparc64/pmap.c:1.271 Thu May 12 05:44:09 2011
+++ src/sys/arch/sparc64/sparc64/pmap.c Mon Jun 6 01:16:48 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.271 2011/05/12 05:44:09 mrg Exp $ */
+/* $NetBSD: pmap.c,v 1.272 2011/06/06 01:16:48 mrg Exp $ */
/*
*
* Copyright (C) 1996-1999 Eduardo Horvath.
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.271 2011/05/12 05:44:09 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.272 2011/06/06 01:16:48 mrg Exp $");
#undef NO_VCACHE /* Don't forget the locked TLB in dostart */
#define HWREF
@@ -292,9 +292,9 @@
#define PDB_REMOVE 0x000004
#define PDB_CHANGEPROT 0x000008
#define PDB_ENTER 0x000010
-#define PDB_DEMAP 0x000020
+#define PDB_DEMAP 0x000020 /* used in locore */
#define PDB_REF 0x000040
-#define PDB_COPY 0x000080
+#define PDB_COPY 0x000080
#define PDB_MMU_ALLOC 0x000100
#define PDB_MMU_STEAL 0x000200
#define PDB_CTX_ALLOC 0x000400
@@ -684,6 +684,8 @@
BDPRINTF(PDB_BOOT, ("Entered pmap_bootstrap.\n"));
+ cache_setup_funcs();
+
/*
* Calculate kernel size.
*/
Added files:
Index: src/sys/arch/sparc64/sparc64/cache.c
diff -u /dev/null src/sys/arch/sparc64/sparc64/cache.c:1.7
--- /dev/null Mon Jun 6 01:16:49 2011
+++ src/sys/arch/sparc64/sparc64/cache.c Mon Jun 6 01:16:48 2011
@@ -0,0 +1,105 @@
+/* $NetBSD: cache.c,v 1.7 2011/06/06 01:16:48 mrg Exp $ */
+
+/*
+ * Copyright (c) 2011 Matthew R. Green
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * Handle picking the right types of the different cache call.
+ *
+ * This module could take on a larger role.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: cache.c,v 1.7 2011/06/06 01:16:48 mrg Exp $");
+
+#include "opt_multiprocessor.h"
+
+#include <sys/param.h>
+#include <sys/reboot.h>
+
+#include <machine/cpu.h>
+
+#include <sparc64/sparc64/cache.h>
+
+static void
+cache_nop(void)
+{
+}
+
+static void
+blast_dcache_real(void)
+{
+
+ sp_blast_dcache(dcache_size, dcache_line_size);
+}
+
+#if 0
+static void
+sp_dcache_flush_page_cpuset(paddr_t pa, sparc64_cpuset_t cs)
+{
+
+ dcache_flush_page(pa);
+}
+
+void (*dcache_flush_page)(paddr_t) = dcache_flush_page_us;
+void (*dcache_flush_page_cpuset)(paddr_t, sparc64_cpuset_t) =
+ sp_dcache_flush_page_cpuset;
+#endif
+void (*blast_dcache)(void) = blast_dcache_real;
+void (*blast_icache)(void) = blast_icache_us;
+
+void
+cache_setup_funcs(void)
+{
+
+ if (CPU_ISSUN4US || CPU_ISSUN4V) {
+#if 0
+ dcache_flush_page = (void (*)(paddr_t)) cache_nop;
+#endif
+ blast_dcache = cache_nop;
+ blast_icache = cache_nop;
+ } else {
+ if (CPU_IS_USIII_UP()) {
+#if 0
+ dcache_flush_page = dcache_flush_page_usiii;
+#endif
+ blast_icache = blast_icache_usiii;
+printf("set usIII dcache/icache funcs\n");
+ }
+#ifdef MULTIPROCESSOR
+ if (sparc_ncpus > 1 && (boothowto & RB_MD1) == 0) {
+printf("set MP dcache funcs\n");
+#if 0
+ dcache_flush_page = smp_dcache_flush_page_allcpu;
+ dcache_flush_page_cpuset = smp_dcache_flush_page_cpuset;
+#endif
+ blast_dcache = smp_blast_dcache;
+ }
+#endif
+ }
+}
