Module Name: xsrc Committed By: mrg Date: Sat Jul 23 08:27:24 UTC 2011
Modified Files: xsrc/external/mit/xf86-video-ati/dist/src: r600_exa.c Log Message: merge xf86-video-ati 6.14.2 To generate a diff of this commit: cvs rdiff -u -r1.2 -r1.3 xsrc/external/mit/xf86-video-ati/dist/src/r600_exa.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
Modified files: Index: xsrc/external/mit/xf86-video-ati/dist/src/r600_exa.c diff -u xsrc/external/mit/xf86-video-ati/dist/src/r600_exa.c:1.2 xsrc/external/mit/xf86-video-ati/dist/src/r600_exa.c:1.3 --- xsrc/external/mit/xf86-video-ati/dist/src/r600_exa.c:1.2 Sun Mar 20 10:40:24 2011 +++ xsrc/external/mit/xf86-video-ati/dist/src/r600_exa.c Sat Jul 23 08:27:24 2011 @@ -53,7 +53,6 @@ { RADEONInfoPtr info = RADEONPTR(pScrn); struct radeon_accel_state *accel_state = info->accel_state; - uint32_t pitch = 0; uint32_t pitch_align = 0x7, base_align = 0xff; #if defined(XF86DRM_MODE) int ret; @@ -64,11 +63,6 @@ accel_state->src_size[0] = src0->pitch * src0->height * (src0->bpp/8); #if defined(XF86DRM_MODE) if (info->cs) { - ret = radeon_bo_get_tiling(accel_state->src_obj[0].bo, - &accel_state->src_obj[0].tiling_flags, - &pitch); - if (ret) - RADEON_FALLBACK(("src0 radeon_bo_get_tiling failed\n")); pitch_align = drmmode_get_pitch_align(pScrn, accel_state->src_obj[0].bpp / 8, accel_state->src_obj[0].tiling_flags) - 1; @@ -95,11 +89,6 @@ accel_state->src_size[1] = src1->pitch * src1->height * (src1->bpp/8); #if defined(XF86DRM_MODE) if (info->cs) { - ret = radeon_bo_get_tiling(accel_state->src_obj[1].bo, - &accel_state->src_obj[1].tiling_flags, - &pitch); - if (ret) - RADEON_FALLBACK(("src1 radeon_bo_get_tiling failed\n")); pitch_align = drmmode_get_pitch_align(pScrn, accel_state->src_obj[1].bpp / 8, accel_state->src_obj[1].tiling_flags) - 1; @@ -125,11 +114,6 @@ accel_state->dst_size = dst->pitch * dst->height * (dst->bpp/8); #if defined(XF86DRM_MODE) if (info->cs) { - ret = radeon_bo_get_tiling(accel_state->dst_obj.bo, - &accel_state->dst_obj.tiling_flags, - &pitch); - if (ret) - RADEON_FALLBACK(("dst radeon_bo_get_tiling failed\n")); pitch_align = drmmode_get_pitch_align(pScrn, accel_state->dst_obj.bpp / 8, accel_state->dst_obj.tiling_flags) - 1; @@ -210,6 +194,7 @@ if (info->cs) { dst.offset = 0; dst.bo = radeon_get_pixmap_bo(pPix); + dst.tiling_flags = radeon_get_pixmap_tiling(pPix); } else #endif { @@ -589,6 +574,8 @@ dst_obj.offset = 0; src_obj.bo = radeon_get_pixmap_bo(pSrc); dst_obj.bo = radeon_get_pixmap_bo(pDst); + dst_obj.tiling_flags = radeon_get_pixmap_tiling(pDst); + src_obj.tiling_flags = radeon_get_pixmap_tiling(pSrc); if (radeon_get_pixmap_bo(pSrc) == radeon_get_pixmap_bo(pDst)) accel_state->same_surface = TRUE; } else @@ -1269,6 +1256,8 @@ dst_obj.offset = 0; src_obj.bo = radeon_get_pixmap_bo(pSrc); dst_obj.bo = radeon_get_pixmap_bo(pDst); + dst_obj.tiling_flags = radeon_get_pixmap_tiling(pDst); + src_obj.tiling_flags = radeon_get_pixmap_tiling(pSrc); } else #endif { @@ -1295,6 +1284,7 @@ if (info->cs) { mask_obj.offset = 0; mask_obj.bo = radeon_get_pixmap_bo(pMask); + mask_obj.tiling_flags = radeon_get_pixmap_tiling(pMask); } else #endif { @@ -1784,7 +1774,7 @@ Bool r; int i; struct r600_accel_object src_obj, dst_obj; - uint32_t tiling_flags = 0, pitch = 0, height, base_align; + uint32_t height, base_align; if (bpp < 8) return FALSE; @@ -1793,14 +1783,10 @@ if (!driver_priv || !driver_priv->bo) return FALSE; - ret = radeon_bo_get_tiling(driver_priv->bo, &tiling_flags, &pitch); - if (ret) - ErrorF("radeon_bo_get_tiling failed\n"); - /* If we know the BO won't be busy, don't bother with a scratch */ copy_dst = driver_priv->bo; copy_pitch = pDst->devKind; - if (!(tiling_flags & (RADEON_TILING_MACRO | RADEON_TILING_MICRO))) { + if (!(driver_priv->tiling_flags & (RADEON_TILING_MACRO | RADEON_TILING_MICRO))) { if (!radeon_bo_is_referenced_by_cs(driver_priv->bo, info->cs)) { flush = FALSE; if (!radeon_bo_is_busy(driver_priv->bo, &dst_domain)) @@ -1824,6 +1810,7 @@ src_obj.bpp = bpp; src_obj.domain = RADEON_GEM_DOMAIN_GTT; src_obj.bo = scratch; + src_obj.tiling_flags = 0; dst_obj.pitch = dst_pitch_hw; dst_obj.width = pDst->drawable.width; @@ -1832,6 +1819,7 @@ dst_obj.bpp = bpp; dst_obj.domain = RADEON_GEM_DOMAIN_VRAM; dst_obj.bo = radeon_get_pixmap_bo(pDst); + dst_obj.tiling_flags = radeon_get_pixmap_tiling(pDst); if (!R600SetAccelState(pScrn, &src_obj, @@ -1901,7 +1889,7 @@ Bool flush = FALSE; Bool r; struct r600_accel_object src_obj, dst_obj; - uint32_t tiling_flags = 0, pitch = 0, height, base_align; + uint32_t height, base_align; if (bpp < 8) return FALSE; @@ -1910,14 +1898,10 @@ if (!driver_priv || !driver_priv->bo) return FALSE; - ret = radeon_bo_get_tiling(driver_priv->bo, &tiling_flags, &pitch); - if (ret) - ErrorF("radeon_bo_get_tiling failed\n"); - /* If we know the BO won't end up in VRAM anyway, don't bother with a scratch */ copy_src = driver_priv->bo; copy_pitch = pSrc->devKind; - if (!(tiling_flags & (RADEON_TILING_MACRO | RADEON_TILING_MICRO))) { + if (!(driver_priv->tiling_flags & (RADEON_TILING_MACRO | RADEON_TILING_MICRO))) { if (radeon_bo_is_referenced_by_cs(driver_priv->bo, info->cs)) { src_domain = radeon_bo_get_src_domain(driver_priv->bo); if ((src_domain & (RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM)) == @@ -1961,6 +1945,7 @@ src_obj.bpp = bpp; src_obj.domain = RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT; src_obj.bo = radeon_get_pixmap_bo(pSrc); + src_obj.tiling_flags = radeon_get_pixmap_tiling(pSrc); dst_obj.pitch = scratch_pitch; dst_obj.width = w; @@ -1969,6 +1954,7 @@ dst_obj.bo = scratch; dst_obj.bpp = bpp; dst_obj.domain = RADEON_GEM_DOMAIN_GTT; + dst_obj.tiling_flags = 0; if (!R600SetAccelState(pScrn, &src_obj,