Module Name: src Committed By: jmcneill Date: Sun Jul 31 17:53:26 UTC 2011
Modified Files: src/sys/dev/isa: finsio_isa.c Log Message: modularize and recognize ASUS F8000 Super I/O chips To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/dev/isa/finsio_isa.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.
Modified files: Index: src/sys/dev/isa/finsio_isa.c diff -u src/sys/dev/isa/finsio_isa.c:1.5 src/sys/dev/isa/finsio_isa.c:1.6 --- src/sys/dev/isa/finsio_isa.c:1.5 Mon Jun 20 18:12:54 2011 +++ src/sys/dev/isa/finsio_isa.c Sun Jul 31 17:53:26 2011 @@ -1,5 +1,5 @@ /* $OpenBSD: fins.c,v 1.1 2008/03/19 19:33:09 deraadt Exp $ */ -/* $NetBSD: finsio_isa.c,v 1.5 2011/06/20 18:12:54 pgoyette Exp $ */ +/* $NetBSD: finsio_isa.c,v 1.6 2011/07/31 17:53:26 jmcneill Exp $ */ /* * Copyright (c) 2008 Juan Romero Pardines @@ -19,11 +19,12 @@ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #include <sys/cdefs.h> -__KERNEL_RCSID(0, "$NetBSD: finsio_isa.c,v 1.5 2011/06/20 18:12:54 pgoyette Exp $"); +__KERNEL_RCSID(0, "$NetBSD: finsio_isa.c,v 1.6 2011/07/31 17:53:26 jmcneill Exp $"); #include <sys/param.h> #include <sys/systm.h> #include <sys/device.h> +#include <sys/module.h> #include <sys/bus.h> #include <dev/isa/isareg.h> @@ -73,6 +74,7 @@ # define FINSIO_IDF71806 0x0341 /* F71872 and F1806 F/FG */ # define FINSIO_IDF71883 0x0541 /* F71882 and F1883 */ # define FINSIO_IDF71862 0x0601 /* F71862FG */ +# define FINSIO_IDF8000 0x0581 /* F8000 */ /* in bank sensors of config space */ #define FINSIO_SENSADDR 0x60 /* sensors assigned I/O address (2 bytes) */ @@ -418,7 +420,7 @@ { .fs_desc = NULL } }; - + static int finsio_isa_match(device_t parent, cfdata_t match, void *aux) { @@ -510,6 +512,10 @@ sc->sc_finsio_sensors = f71883_sensors; aprint_normal(": Fintek F71882/F71883 Super I/O\n"); break; + case FINSIO_IDF8000: + sc->sc_finsio_sensors = f71883_sensors; + aprint_normal(": ASUS F8000 Super I/O\n"); + break; default: /* * Unknown Chip ID, assume the same register layout @@ -682,3 +688,32 @@ edata->state = ENVSYS_SVALID; } } + +MODULE(MODULE_CLASS_DRIVER, finsio, NULL); + +#ifdef _MODULE +#include "ioconf.c" +#endif + +static int +finsio_modcmd(modcmd_t cmd, void *opaque) +{ + int error = 0; + + switch (cmd) { + case MODULE_CMD_INIT: +#ifdef _MODULE + error = config_init_component(cfdriver_ioconf_finsio, + cfattach_ioconf_finsio, cfdata_ioconf_finsio); +#endif + return error; + case MODULE_CMD_FINI: +#ifdef _MODULE + error = config_fini_component(cfdriver_ioconf_finsio, + cfattach_ioconf_finsio, cfdata_ioconf_finsio); +#endif + return error; + default: + return ENOTTY; + } +}