Module Name: src
Committed By: msaitoh
Date: Sun Aug 14 12:42:20 UTC 2011
Modified Files:
src/sys/arch/x86/pci: ichlpcib.c
Log Message:
Add some LPC entries for Intel 6 series and C20x.
To generate a diff of this commit:
cvs rdiff -u -r1.32 -r1.33 src/sys/arch/x86/pci/ichlpcib.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/pci/ichlpcib.c
diff -u src/sys/arch/x86/pci/ichlpcib.c:1.32 src/sys/arch/x86/pci/ichlpcib.c:1.33
--- src/sys/arch/x86/pci/ichlpcib.c:1.32 Fri Jul 1 18:22:08 2011
+++ src/sys/arch/x86/pci/ichlpcib.c Sun Aug 14 12:42:19 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: ichlpcib.c,v 1.32 2011/07/01 18:22:08 dyoung Exp $ */
+/* $NetBSD: ichlpcib.c,v 1.33 2011/08/14 12:42:19 msaitoh Exp $ */
/*-
* Copyright (c) 2004 The NetBSD Foundation, Inc.
@@ -39,7 +39,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ichlpcib.c,v 1.32 2011/07/01 18:22:08 dyoung Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ichlpcib.c,v 1.33 2011/08/14 12:42:19 msaitoh Exp $");
#include <sys/types.h>
#include <sys/param.h>
@@ -197,6 +197,21 @@
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801IEM_LPC, 1, 0 },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801IB_LPC, 1, 0 },
{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_63XXESB_LPC, 1, 0 },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_B65_LPC, 1, 0 },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C202_LPC, 1, 0 },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C204_LPC, 1, 0 },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C206_LPC, 1, 0 },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_H61_LPC, 1, 0 },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_H67_LPC, 1, 0 },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_HM65_LPC, 1, 0 },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_HM67_LPC, 1, 0 },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_NM10_LPC, 1, 0 },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_P67_LPC, 1, 0 },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_Q65_LPC, 1, 0 },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_Q67_LPC, 1, 0 },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_QM67_LPC, 1, 0 },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_QS67_LPC, 1, 0 },
+ { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_UM67_LPC, 1, 0 },
{ 0, 0, 0, 0 },
};
