Module Name: src
Committed By: jym
Date: Sat Sep 24 10:49:14 UTC 2011
Modified Files:
src/sys/arch/x86/x86: intel_busclock.c
Log Message:
Be conservative when reading MSR_FSB_FREQ by using rdmsr_safe(). We cannot
tell in advance when new CPU model/family combo will come and trying to
read that MSR early during boot may cause unhandled faults.
To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/x86/x86/intel_busclock.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/x86/x86/intel_busclock.c
diff -u src/sys/arch/x86/x86/intel_busclock.c:1.12 src/sys/arch/x86/x86/intel_busclock.c:1.13
--- src/sys/arch/x86/x86/intel_busclock.c:1.12 Wed Feb 23 11:43:23 2011
+++ src/sys/arch/x86/x86/intel_busclock.c Sat Sep 24 10:49:13 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: intel_busclock.c,v 1.12 2011/02/23 11:43:23 jruoho Exp $ */
+/* $NetBSD: intel_busclock.c,v 1.13 2011/09/24 10:49:13 jym Exp $ */
/*-
* Copyright (c) 1999, 2000, 2001 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: intel_busclock.c,v 1.12 2011/02/23 11:43:23 jruoho Exp $");
+__KERNEL_RCSID(0, "$NetBSD: intel_busclock.c,v 1.13 2011/09/24 10:49:13 jym Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -104,13 +104,11 @@
* Newer CPUs will GP when attemping to access MSR_FSB_FREQ.
* In the long-term, use ACPI instead of all this.
*/
- switch (CPUID2EXTMODEL(ci->ci_signature)) {
- case 0x2:
- aprint_debug("%s: unable to determine bus speed",
- device_xname(ci->ci_dev));
+ if (rdmsr_safe(MSR_FSB_FREQ, &msr) == EFAULT) {
+ aprint_debug_dev(ci->ci_dev,
+ "unable to determine bus speed");
goto print_msr;
}
- msr = rdmsr(MSR_FSB_FREQ);
bus = (msr >> 0) & 0x7;
switch (bus) {
case 1:
@@ -123,7 +121,11 @@
}
break;
case 0xd: /* Pentium M (90 nm, Dothan) */
- msr = rdmsr(MSR_FSB_FREQ);
+ if (rdmsr_safe(MSR_FSB_FREQ, &msr) == EFAULT) {
+ aprint_debug_dev(ci->ci_dev,
+ "unable to determine bus speed");
+ goto print_msr;
+ }
bus = (msr >> 0) & 0x7;
switch (bus) {
case 0:
@@ -144,15 +146,18 @@
* Newer CPUs will GP when attemping to access MSR_FSB_FREQ.
* In the long-term, use ACPI instead of all this.
*/
- switch (CPUID2EXTMODEL(ci->ci_signature)) {
- case 0x1:
- aprint_debug("%s: unable to determine bus speed",
- device_xname(ci->ci_dev));
+ if (rdmsr_safe(MSR_FSB_FREQ, &msr) == EFAULT) {
+ aprint_debug_dev(ci->ci_dev,
+ "unable to determine bus speed");
goto print_msr;
}
/* FALLTHROUGH */
case 0xf: /* Core Xeon */
- msr = rdmsr(MSR_FSB_FREQ);
+ if (rdmsr_safe(MSR_FSB_FREQ, &msr) == EFAULT) {
+ aprint_debug_dev(ci->ci_dev,
+ "unable to determine bus speed");
+ goto print_msr;
+ }
bus = (msr >> 0) & 0x7;
switch (bus) {
case 5:
